Low power design

Extensive experience on low-power implementation techniques: multi-voltage domains, power shutdown, multiple threshold voltage levels.

The imec.IC-link design team has extensive experience in implementing advanced flow and low-power techniques in: 

  • Massive clock gating
  • Power shut-off
  • Multi-supply voltage domains
  • Multi-Vt
  • Body-bias
  • Common Power and Unified Power formats
  • Multi-mode multi-corner optimization & analysis

Depending on your specific needs you can choose the entry point in the design flow: specification, RTL, netlist, placed gates or GDSII. You can choose to handle the top-level integration of digital sub-blocks yourself (analog-on-top) or use our services to integrate the digital top-level ASIC including analog IP blocks(digital-on-top).