Recording of various physiological signals, especially in ambulatory environments, are often contaminated by motion artifacts. The artifacts, which are any unwanted variation in a signal caused by an external source, manifest themselves as (severe) disturbances in the measured signal. Due to its often unpredictable nature, reducing the effect of motion artefacts on the measured signal is often extremely difficult. A lot of prior work on motion artefact reduction is available. However, up till now, there is no reliable solution available.
Reducing the effect of artefacts caused by (in some way) regular movements, e.g., by walking or running is considered as relatively less difficult due to its regular nature. However, the kind of artefact differs from person to person due to differences in the way the persons move and behave. Artefact reduction filters that automatically optimizes themselves based on the kind of motion artefact are (obviously) much more effective than statically configured filters. One promising way to perform automatic optimization is by machine learning techniques: The system ‘learns’ without being explicitly programmed.
This PhD research activity targets to develop new filters that configures / optimizes themselves for reducing motion artefacts using machine learning techniques. Although these techniques can be applicable for any physiological signal, it will focus initially only on PhotoPlethysmoGraph (PPG) signals, which is an optical method of recording heartrate. PPG is often measured in non-clinical (e.g., during fitness) environments and is popular in wrist-worn devices because it allows heartrate measurements without requiring wires attached to the body. The machine-learning framework will be leveraged to combine several sensor modalities as input to newly developed algorithms to improve the robustness of PPG recording. In a later phase the concepts will be generalized to other wearable healthcare applications. This PhD topic will require a large degree of algorithm development, but will also require an ASIC implementation of those algorithms. Hence the candidate must have a strong affinity with system/algorithm design and must also be familiar with basic digital integrated circuit design.
Electrical engineering with strong affinity to integrated circuit design.
Type of work:
40% algorithm development, 40% digital IC design, 20% system design and validation.
Supervisor: Chris Van Hoof
Daily advisor: Nick Van Helleputte
When you apply for this PhD project, mention the following reference code in the imec application form: ref. SE 1704-11.