For enabling future electronic systems multiple evolutionary and revolutionary options have been proposed. Among those graphene is a very interesting material option due to its peculiar electronic properties. Besides the attractive material properties several critical challenges need to be overcome related to edge scattering, graphene ribbon scaling, contact resistance and improving and understanding scattering mechanisms.
In this project we want to assess the potential of multi-layer graphene as contact metal for interconnect scaling. The choice for graphene and graphene like materials is based upon the intrinsic high conductivity of these materials combined with its high scaling potential. In the current state of the art, graphene ribbons are scaled down to 8 nm, while chemical doping is applied to maintain the high current levels needed. [Kondo et al., IEEE Proc. of IITC 2014, p 189]. However, it remains challenging to control the behavior of individual test structures, as well as maintaining the integration aspects in an BEOL environment.
The primary focus in this work will be to systematically and reliably scale down the graphene ribbon width below 20nm, while evaluating integration routes onto standard interconnects metallization templates. In this respect, full wafer integration will become a major part of the challenge in order to reach the level of stability and scaling that we are targeting. The electrical performance of the (multi-layer) graphene wires requires evaluation in stressed conditions at elevated temperatures, as well as breakdown currents and electron migration needs to be monitored and understanding needs to be gained by working out the relevant models.
Moreover, the intrinsic graphene quality will have a large impact on the performance of the test structures, combined with different doping mechanisms that needs to be applied in order to reach the relevant current levels. Therefore, the second part of the work will be focused on improving the intrinsic material properties, numbers of conductive layers as well as working on the further development of stable and efficient integration routes working towards maximum learning output and understanding.
Material physics, electron device physics.
Type of work:
80% experimental work, 20% literature and modeling.
Supervisor: Marc Heyns, Bart Soree and Iuliana Radu
Daily advisor: : Inge Asselberghs
When you apply for this PhD project, mention the following reference code in the imec application form: ref. STS 1704-08.