PhD researcher on Power delivery network design methodologies for multi-chip systems

Leuven - PhD
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Meer dan twee weken geleden
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Power supply in advanced IC systems introduces serious challenges such as increased power density, IR drop, simultaneous switching noise, and heat dissipation. With the integration of multiple chips in a single package using 2.5D or 3D stacking, efficient power distribution to different system components is also required. Device scaling alone cannot address all these challenges. New methodologies for effective power distribution networks (PDN) at system level should be considered that incorporate the use of on-chip as well as off-chip elements, such as decoupling capacitors, inductors and voltage regulators. Furthermore, 3D circuit integration is also providing new opportunities for multi-component power distribution. Alternative chip stacking techniques with different 3D interfaces and the capability of integrating highly-efficient passive components, create a very dynamic design space with plenty of design options to optimize the integrity of power supply.

The objective of this Ph.D. is to investigate novel design methodologies for effective power delivery in advanced IC systems considering the integration of multiple chip components. In the first part of the research, studying different system applications and PDN architectures will identify the system-level requirements for power integrity. In collaboration with imec’s technology development experts, different PDN components will be modelled and simulated to investigate the correlation among them and their impact on the system-level power supply. 3D stacking of chips will also be considered to study the integration of highly-efficient PDN components. These results will be used to define PDN architectures and experiments that would be designed and implemented on experimental test chips. In the second phase of the research project, characterization of the test chips will be used to verify and further tune the developed PDN models leading to the final formulation of design methodologies for PDN implementation on advanced multi-chip systems.

In this work, the candidate will interact with experts from industry and academia in different fields, including component modeling, simulation and design, technology development, and material characterization. This work will provide broad exposure and the opportunity for an in-depth understanding of models, technologies, and materials used in the semiconductor industry for the design of advanced IC systems.

This PhD will be done at imec in collaboration with Electrical Engineering Department at KU Leuven.

Required background: 

Electrical engineering. RF and analog design experience is an asset but not required.

Type of work:

10% literature survey, 40% technology study, modeling and simulations, 20% circuit design, 20% experimental work; 10% reporting in meetings, conferences and journals.

Supervisor: Rudy Lauwereins

Daily advisor: Geert Van der Plas

When you apply for this PhD project, mention the following reference code in the imec application form: ref. STS 1704-10.

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