The 7th imec-Stanford International Workshop on Resistive Memories

Leuven, September 7–8, 2017

Dear Colleague,

Imec and Stanford NMTRI* are jointly organizing the 7th International Workshop on Resistive Switching Memories. Resistive memories are seen today as one of the most promising emerging candidates to become a key memory technology of the future, with many potential applications, ranging from replacement of current mass production commodity memories to embedded applications and even creating novel market segments.

This year, the workshop will be held at the imec headquarters in Leuven, Belgium, on September 7th and 8th, 2017, and will be organized with the support of**.

This 7th Workshop will address various aspects of resistive switching memory (including oxide based RRAM, CBRAM and phase change memory), ranging from the fundamentals of materials and device physics to circuit/system and application areas, including the beyond-memory application space. Selector is a key part of the memory cell, and will be an integral part of our program.

The intention for this workshop is to serve as a forum gathering key scientists and technologists working on resistive memories, including academia as well as industry, to discuss fundamental mechanisms controlling the operation, scalability and reliability of these exciting memory devices, their technological potential, novel circuit/system needs and approaches, as well as challenges ahead.

Previous workshop editions held in imec and Stanford were very successful, with participants from industry, academia, and research consortia. This workshop will follow the same successful format of previous editions. The workshop will consist of invited talks and panel discussion, as well as a poster session aiming at encouraging a wider participation including students. To foster discussions, the workshop will be kept small and participation will be by invitation only.

On behalf of the Organizing Committee of the 7th International Workshop on Resistive Switching Memory, we herewith are pleased to invite you to mark your calendar and plan on attending this invitation-only workshop.

For further details concerning the program, registration, as well as for practical information, please check the links at the top of this page.

We are looking forward to your participation in this year’s workshop.

Sincerely Yours,

Dr. D.J. Wouters
RWTH Aachen

Prof. H.-S. P. Wong
Stanford University

Prof. Y. Nishi
Stanford University

Dr. B. Govoreanu



* Stanford NMTRI (Nonvolatile Memory Technology Research Initiative) is an industrial affiliate program at Stanford. URL:

** is the learning lever for both imec's own employees and the local and international industry and academia. It strives to educate, develop and inspire individuals and groups. It wants to empower them to stay successful in their research and development: learning for excellence. Its unique high-tech environment and its international top-talent enable it to combine advanced world-class expertise with hands-on applications in the domains in which imec excels. URL:



Please fill in and submit the registration form below. The advance online registration will close on August 31st, 2017. After this date please contact the organizers at: and/or

Attendance fee: 120 euros (not for invited lecturers)

Workshop Program

The workshop will take place in the imec Auditorium (imec 1 building).

The final agenda of the workshop is available below and in pdf.

Final Program (pdf)


DAY 1: September 7th, 2017

8:15 - 9:00 – Registration & Welcome

Session 1: Fundamentals

  9:00 - 9:30

M. Skowronski1, Y. Ma1, A. Herzing2, D. Li1, and J. A. Bain1


Formation of the Non-Volatile Filament in TaOx Resistive Switching Devices: A TEM Study

  9:30 - 10:00

Chris Regan


Imaging current pathways in selector and metal oxide RRAM devices

  10:00 - 10:30

Sergiu Clima


A first-principles study on possible OTS mechanisms in GeSe

10:30 - 11:00 – Coffee break

Session 2: Selectors

  11:00 - 11:30

Carsten Funck

RWTH Aachen

Mechanism of threshold switching in NbOx

  11:30 - 12:00

Z. Jiang, S. Qin, H. Li, S. Simon Wong, H.-S. P. Wong

Stanford University

Selector requirements for 3D vertical RRAM

  12:00 - 12:30

Hongxin Yang

Avalanche Technology

Volatile Switch Selector development for 3D RRAM and STT-MRAM

12:30 - 13:30 Lunch break (sandwiches)

Session 3: RRAM-1

  13:30 - 14:00

Susanne Hoffman-Eifert

FZ Juelich

Stable counter-8 wise and 8 wise switching in OxRAM cells containing TiO2 layer

  14:00 - 14:30

Attilio Belmonte


Stack engineering of WOx - based CBRAM: identifying the material properties for improving reliability

  14:30 - 15:00

Hangbing Lv, Ming Liu

Institute of Microelectronics, CAS

3D RRAM for Storage Class Memory Application

15:00 - 15:30 – Coffee break

Session 4: RRAM-2

  15:30 - 16:00

Philippe Boivin

ST Microelectronics

Embedded Memory requirements for IoT

  16:00 - 16:30

Kazuyuki Kouno


ReRAM device and circuit design for memory and future beyond-memory applications

  16:30 - 17:00

Eric Lee


Recent WOx ReRAM Results, Applications, and Outlook

17:00 - 18:00 – Posters Session

19:30 - 22:30 – Dinner at the Faculty Club

DAY 2: September 8th, 2017


Session 5: Applications: Neuromorphic Computing

  9:00 - 9:30

Daniele Ielmini

Politecnico di Milano

Neuromorphic hardware for pattern learning with memristive synapses

  9:30 - 10:00

Praveen Raghavan


OxRAM as an neuromorphic element: what are the possibilities?

  10:00 - 10:30

Shimeng Yu

Arizona State University

System-level Benchmark of Resistive Synaptic Device Characteristics for Neuro-inspired Computing

10:30 - 11:00 – Coffee break

Session 6: PCM - 1

  11:00 - 11:30

Matthias Wuttig

RWTH Aachen University

Chalcogenide materials exploration for PCM and OTS applications

  11:30 - 12:00

S. Fong, C. Neumann

Stanford University

Thermal confinement of PCM using dielectric multilayer stacks

12:00 - 13:30 – Lunch (cold buffet)

Session 7: PCM - 2

  13:30 - 14:00

Enrico Varesi


Highlights and challenges of chalcogenide supperlattice PCM

  14:00 - 14:30

Keh-Chung Wang


Recent Progress and Prospect of PCMs

14:30 - 15:00 – Coffee break

Session 7: Exploratory – Memory & Beyond

  15:00 - 15:30

Mario Lanza

Soochow University

Status and prospects of 2D materials based memristors

  15:30 - 16:00

Joshua J. Yang

Univ. Mass. Amherst

Challenges and possible solutions for RRAM-based computing

  16:00 - 16:30

Laurent Cario


Mott insulator for implementing single component LIF artificial neuron

16:45 - 18:00 -- Panel discussion

  • Topic: Is PCM the next RRAM?
  • Panelists:
  • Philippe Boivin (ST Microelectronics), Geoffrey Burr (IBM), Daniele Ielmini (Politecnico di Milano), Kazunari Ishimaru (Toshiba), Takumi Mikawa (Panasonic), Keh-Chung Wang (Macronix)

18:00 – 18:15 Workshop Closure

Getting There

Leuven is easily accessible by train and by car.

When getting to Belgium by plane, Brussels Airport (Zaventem) is the closest airport.

Brussels South Airport (Charleroi) is about one-hour drive from Leuven.

When getting to Belgium by international train, the international railway station is Brussels South (Bruxelles Midi).

Find more here


Hotel The Lodge

Beautifully restored farmstead which was transformed into a stylish hotel and is just a 10-minute walk from imec.

Hotel Novotel Leuven Centre

Cosy hotel with modern rooms within walking distance of the train and bus station and the city centre.

Reaching imec is possible by bus: bus line 2 (stop Campus Arenberg) or bus line 616 (stop Celestijnenlaan).


Cool designed hotel with an air of comfort and warmth.

Reaching imec is possible by bus: bus line 2 (stop Campus Arenberg) or bus line 616 (stop Celestijnenlaan).

Begijnhof Hotel

Beautiful hotel around the UNESCO world heritage beguinage of Leuven.
Tervuursevest 70

Other hotels in Leuven:

Please ask for the imec rate.

If, next to the Workshop, you plan on attending ESSDERC 2017 as well, you may also consider accommodation using the ESSDERC rate, and ask the hotel to extend this duration to your whole stay (where possible).

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