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/Applications/Advanced semiconductor process technology

Advanced semiconductor process technology

From exploration to implementation, imec is your partner to develop the processes for the next generations of semiconductor technology.

In today’s rapidly evolving world, there’s a need for faster, cheaper, and especially more energy-efficient computing. The exponential rise in multimedia content, the steeply growing data streams from sensors, artificial intelligence and high-performance computing ... all require that we keep on scaling computer chips.

Imec has been at the forefront of scaling from its inception in 1984. We have a track record of providing the industry with pioneering solutions for next-generation semiconductor processing. That offering is supported by a leading expertise in characterization, metrology, design, modeling, reliability analysis, system-technology co-optimization and many more. All at your disposal.

Complement that with:

  • access to the world’s largest semiconductor ecosystem including foundries, IDMs, fabless and fablite companies, equipment and material suppliers, academia
  • the largest and most advanced 300mm cleanroom dedicated to R&D

Next-generation logic devices

Imec’s R&D program on advanced logic scaling is exploring and implementing solutions, targeting new requirements for performance, power, cost, and density scaling of future logic nodes down to 1 nm and beyond.

We are currently working to introduce innovative device architectures such as gate-all-around nanosheets or nanowires, forksheet devices, or even further out: complementary FETs (cFET) and devices made from 2D materials.

To further boost compute densities, these are more and more to be complemented with system-technology co-optimization (STCO): identifying technology solutions to address system issues.

Finally, imec’s scientists are looking to unlock concepts beyond silicon CMOS technology.

Learn more

Innovative storage and memory solutions

The amount of digital data produced in the world will soon exceed 100 zettabytes. That will impose whole new requirements on digital memories, foremost a radically improved density and speed, and a seriously reduced energy consumption.

To meet these requirements, imec and its partners in the joint program on advanced memory concepts are exploring a range of innovative memory options, for standalone as well as for embedded applications. The options range from MRAM technologies for cache-level applications to new ways for improving DRAM devices such as 3D DRAM.

When it comes to non-volatile memories, imec looks into next-generation storage technologies such as continued 3D scaling of NAND, 3D ferroelectric FETs (FeFETs) and new concepts such as DNA-inspired concepts.

Advanced process steps and patterning

To enable scaling and new technology nodes, ever more refined process steps and patterning techniques are required.

Therefore, imec is teaming up with the world’s leading tool and material suppliers. These make the latest tools and techniques available in imec’s advanced 300mm cleanroom. The result is a unique, vendor-neutral lab where the required advanced process steps for next-generation logic and memory circuits can be developed and perfected.

So whether you develop patterning tools, resist chemicals, semiconductor materials, analysis software, semiconductor process technology tools, or whether you’re perfecting advanced process steps for next technology nodes, you’re sure to profit from our ecosystem, cleanroom and many collaboration options.

One of the highlights of our R&D is the work we do on advanced lithography. In the frame of a broad collaboration with ASML, we’re developing next-generation EUV patterning solutions. Currently, we’re working on accelerating the industrialization of EUV lithography, e.g. by pro-actively analyzing and solving technical challenges related to stochastic defects, reliability and yield.

Imec Demonstrates 20nm Pitch Line/Space Resist Imaging with High-NA EUV Interference Lithography

In a next step, imec and ASML collaborate on high-NA EUV patterning. In addition, we’ve set up the AttoLab, where we study EUV photon absorption and subsequent ionization processes at unprecedented timescales from attoseconds to picoseconds.

Learn more

3D processing and integration

Using the third dimension – stacking chips, bare dies, circuits, and transistors is – another clever way to boost the density of functions on ICs and bring down their cost.

With its collaborative program on 3D integration, imec has been at the forefront for quite some time. We’re at the same time enabling and refining new fabrication processes and exploring emerging and future technologies:

  • We’re exploring the limits of what is physically possible for die-to-wafer bonding. For example by demonstrating microbump interconnects and hybrid copper bonding with record-low pitch.
  • We boost high-density wafer-to-wafer stacking by using techniques such as nano-vias, new wafer reconstruction techniques and high-density retribution (RDL).

Find out more

3D stacked ICs after die-to-wafer bonding process

Deeply-scaled interconnects

Scaling interconnects towards the 3nm technology node and beyond will require a range of process innovations, scaling boosters and new materials, all of which imec and its partners are working on.

The toolbox that we’re developing for future interconnects includes, amongst many others, the insertion of single-print extreme ultraviolet (EUV) lithography, structured scaling boosters such as self-aligned gate contacts and buried power rails. These innovations will be complemented by the introduction of new materials such as ruthenium, molybdenum and even a hybrid graphene/metal conductor.

Another exciting possibility is the addition of extra functionality to the back end of line (BEOL) by using thin-film transistors (TFTs)

If you are interested in joining this breakthrough program, come and talk to us to learn more.

Optical interconnects

The exponential growth of compute and memory capacity necessitates a corresponding growth of I/O bandwidth. Optical links can provide a solution at all levels of a computer system.

Building on its silicon photonics platform and experience in 3D system integration, imec looks at ways to scale bandwidths, improve the power efficiency and reduce the costs of optical interconnects. We do this by targeting components such as optical modulators and waveguide photodetectors.

Learn more

Neuromorphic circuits

Since the early days of the digital computer, processing has been separated from memory. But this poses a problem for e.g. digital neural networks, which perform operations on large datasets. These all have to be retrieved from storage memory, which can limit and impede the actual computation.

A solution is to perform the vector-matrix multiplications with a lower precision on analog technology, which returns results that are accurate enough for specific applications. A second piece of the puzzle is to combine this with in-memory computation, which alleviates a large part of the processor/memory traffic.

Imec has set itself the challenge of creating a breakthrough and enabling this type of neuromorphic computing. Recently, it has unveiled an AI chip that is suitable for, e.g., inference at the edge of IoT sensor networks.

Learn more about imec’s research into machine learning accelerators.

Imec’s AnIA test chip mounted on a PCB. Based on imec’s Analog in Memory Computing (AiMC) architecture the chip is optimized to perform deep neural network calculations on in-memory computing hardware in the analog domain.

Quantum computing

Quantum computing is one of the most exciting roads to the future of computing. But before it becomes available, a myriad of technological challenges has to be overcome. Imec is uniquely placed to help solve these, thanks to its extensive expertise in high-precision process development and the ability to run integrated device-fabrication flows combined with device design and modeling. For example, our scientists have managed to set up the world’s first flexible platform for silicon spin qubit integration on 300mm wafers.

If you join this collaborative effort into quantum computing, you’ll get insights and advance knowledge in enabling large-scale qubit fabrication, performance improvement and variability reduction of both silicon and superconducting qubits. Moreover, as quantum computing is done at near-zero K temperatures, we are also working on cryoelectronics and the 3D integration and packaging of cryocomponents.

Materials and components analysis

The industry continues to push new device architectures made with novel materials. As a result, there is also a need for evolving analytical capabilities, whether for materials characterization or inline metrology. Imec is integrating – and helps you to integrate – the latest techniques into critical process steps.

In our AttoLab, we have the tools for characterization that support farsighted R&D topics such as 2D materials.

Interested? Have a look at our dedicated webpage on imec’s metrology services.

In addition, as an imec partner you have access to wafers based on the latest N+1 and N+2 technology. Examples are FEOL FinFet STI wafers, BEOL dual damascene wafers, calibration wafers, or TSV wafers. These allow you to validate equipment and materials and to develop advanced process technology (etch, deposition, clean, CMP, metrology and lithography).

Semiconductor reliability testing

To guarantee and improve the yield, robustness and reliability of an IC, you need to test at all levels of processing and system design, including mechanical and thermal modeling of subsystems, systems and packages.

Guided by a holistic approach, imec offers you a complete set of models, test and characterization methodologies and software tools. You can use them in every stage of your technology development. And we can even design virtual experiments to mimic the harsh conditions that are typical for automotive or space applications.

Find out more

System-technology co-optimization

For next-generation technology – 3nm and beyond – it will be key to look at scaling ever larger functional units. We will therefore shift part of our R&D focus from scaling at the level of logic/memory cells (DTCO) to scaling at the level of system functions (STCO).

Where we used to scale devices and cells through introducing new materials, interconnects and boosters on the one hand, and look for new efficient functional units (memories, cooling solutions, packaging) on the other, these two efforts will now merge.

Imec’s researchers, together with its partners are, e.g. enabling:

  • new functional components in optimized technologies (analog RF, IGZO switch…)
  • new 3D and interconnect techniques to integrate heterogeneous components
  • new SRAM technologies (MRAM, VFET, ...)
  • new SoC architectures (APU, accelerators)

One excellent example of how the merging of a system and technology perspective produces better results is our Advanced RF program.

Develop your advanced semiconductor processes with imec

We offer you R&D solutions to create new technologies as well as innovation services for your products and ideas. Your project can be big or small, stand-alone or have multiple partners, our expertise comes without question.

Here are a few of the many collaboration possibilities:

Contact our experts