22 - 25 May 2023 | Dresden, Germany
At the 2023 IEEE International Interconnect Technology Conference (IITC), imec has 10 oral presentations addressing the main challenges in interconnect scaling, enriching its comprehensive roadmap with new insights, improved integration schemes and new materials. Besides two papers on alternative metals exploration – including one invited paper by Christoph Adelmann, scientific director at imec – the papers highlight work on 2 metal level semi-damascene metallization with fully-self-aligned vias, reliability mechanisms, thermal impact of advanced interconnect stacks, middle-of-line wiring schemes to enable tight cell boundaries, and more. Imec also has one poster on ultra-scaled, graphene-capped interconnects at the poster session.
Session 3: Advanced Interconnects I
Improving uniformity of 3-level High Aspect Ratio Supervias
Daniel Montero
Two-level Semi-damascene interconnect with fully self-aligned vias at MP18
Giulio Marti
Poster session
Ultrascaled graphene-capped interconnects: a quantum mechanical study
Peter Reyntjens
Microsecond UV laser annealing annihilating Ru grains smaller than electron mean free path
Lu Lu, Laser Systems & Solutions of Europe (LASSE) & Nicolas Jourdan, imec
Session 7: Modelling
Calibrated fast thermal calculation and experimental characterization of advanced BEOL stacks
Xinyue Chang, KU Leuven & imec
Session 8: Materials and Unit Process
Intermetallic Compounds as Alternatives to Copper for Advanced Interconnect Metallization (Invited), Christoph Adelmann
Reduced resistivity of NiAl by backthinning for advanced interconnect metallization, Jean-Philippe Souile
Session 9: Reliability and Failure Analysis
Experimental Study Of Interface & Bulk Defectivity In Ultra-Thin BEOL Dielectrics By Using Low Frequency Noise Spectroscopy, Nishant Saini, KU Leuven & imec
Session 10: Novel System and Emerging Technology
Exploring the Benefits of Cryogenic Temperatures for Co and Ru Metallizations, Davide Tierno
Session 12: Advanced Interconnect II
Selective ALD Mo Deposition in 10nm Contacts, Marleen van der Veen
Integrating 8nm Self-Aligned Tip-to-Tip to Enable 4-track Standard Cell Architecture as Scaling Booster, Phillippe Marien
Towards Enabling Two Metal Level Semi-Damascene Interconnects for Superconducting Digital Logic: Fabrication, Characterization and Electrical Measurements of Superconducting NbxTi(1-x)N, Ankit Pokhrel