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/Job opportunities/3D interconnects for devices working at low/cryogenic temperatures in 3D stacking

3D interconnects for devices working at low/cryogenic temperatures in 3D stacking

PhD - Leuven | More than two weeks ago

As PhD researcher in 3D system integration group, you will be involved in the fabrication, 3D bonding, electrical test and characterization of IMC properties at cryogenic temperatures for quantum computers.

For some applications including quantum computers, aerospace, medical devices like MRI, cyclotrons for high energy physics research and cryogenic oxygen generators, electronic circuits and devices must be operated at very low temperatures. For instance, in quantum computers, to prevent unwanted thermal excitation of the states, qubits must work at temperatures around 20-50mK. These applications strongly push for the development of future (3-5 years from now) microelectronics devices and packages which can work reliable at these low temperatures.

At this moment, Sn-based solder bumps are used typically to electrically connect silicon chips to a substrate for packaging, or to each other for 3D-technology (stacking and interconnecting of many thinned Si-chips). These bumps are plated between Cu-pads, called under-bump metal (UBM).

However, at such low temperatures, these conventionally used Sn based solders will undergo a ductile to brittle transition due to a phase change from the white (β) to the gray (α) phase, resulting in powder-like material and thus catastrophic failure of electronic components.   

 

The goal of this PhD thesis is to select and study possible metals that can be used as solder and UBM for packaging and 3D integration of devices which work at low temperatures.

 

Indium and bismuth-based solders are two potential candidates.

 

The properties to be studied include:

  • processing related properties, such as wettability and assessment of electroplating
  • material properties such as IMC (intermetallic compound) phase formation, grain size and orientation, and the thermal expansion coefficient. And how these properties change at lower temperatures.
  • mechanical properties such as tensile strength and fracture location, also as a function of (lower) temperature
  • electrical properties such as the resistance in function of (low) temperature
  • reliability properties, such as electromigration and corrosion resistance, at low temperatures

These properties will be studied using in-situ electrical measurements at different temperatures on dedicated test samples; X-ray CT analysis (if possible also in-situ) of the solder and of the IMC shape and evolution, and of bonded stacks (voids, delamination, solder volume distribution); and cross-sectional SEM/EBSD analysis of the solder bumps, Additional analysis techniques such as AFM to study roughness, XPS and Auger to study material composition,  and contact angle measurements to study wettability will also be applied (by the PhD student or in collaboration with tool experts).To understand the IMC phase evolution and wettability, phase field and molecular dynamic simulations might be needed as well.

 

The PhD candidate has preferably a materials engineering background. Know-how of electrical measurements and of different analyses techniques such as SEM, XPS, Auger, contact angle measurements, TEM, AFM, XCT and EBSD is an advantage.



Required background: Material science, electrical engineering, Physics

Type of work: 60% experimental, 30% simulation, 10% literature study

Supervisor: Ingrid De Wolf

Daily advisor: Jaber Derakhshandeh

The reference code for this position is 2021-029. Mention this reference code on your application form.

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