/Area-selective deposition: a bottom-up technique for creating future nanoscale CMOS devices

Area-selective deposition: a bottom-up technique for creating future nanoscale CMOS devices

PhD - Leuven | More than two weeks ago

You will gain fundamental understanding that will contribute to the development of innovative and industrially relevant solutions for future nano-electronic devices
Nano-electronic device fabrication processes are becoming increasingly complex due to the miniaturization of device dimensions and the implementation of new materials. In addition, new device and design concepts are being implemented that imply an evolution in the vertical direction to reduce of the active footprint. The Complementary Field Effect Transistor (CFET) is proposed for the ultimate scaling of logic devices. The CFET is a compact “folded” CMOS structure with the n-type and p-type device stacked on top of each other instead of next to each other, to fully exploit device scaling in 3D. However, creating such CFET devices poses major challenges to the conventional fabrication processes, as it requires the placement of materials in nanoscale 3D structures with complex shape and high aspect ratio, with accurate control in the horizontal and vertical direction. Bottom-up approaches like area-selective deposition (ASD) show great promise in that respect. ASD is a technique to deposit material only on a predefined area or pattern, while no deposition occurs on the rest of the surface. This can be achieved by deposition techniques that rely on selective surface reactions like atomic layer deposition (ALD) and chemical vapor deposition (CVD). The great opportunity for ASD is that it can in principle place structures on 3D structures with atomic precision in both horizontal and vertical direction. ASD is therefore a very promising technique for the fabrication of CFET devices. In addition, ASD is a sustainable and cost-effective approach that requires less chemical products and energy as compared to traditional top-down patterning.


Nevertheless, the application of ASD for CFET fabrication is currently hampered as today only a limited number of materials can be deposited by ASD. In addition, the inherent surface dependence of ALD and CVD processes is rarely sufficient, as high selectivity is needed to enable high yield in device fabrication. A better understanding in the surface dependence of ALD and CVD processes and the role of the precursors is essential to expand the material combinations accessible by ASD, as well as to improve selectivity.


The general aim of this PhD project is to generate insight in the selectivity of ALD and CVD processes and use that to design novel ASD processes for the fabrication of CFET devices. A first research objective is to generate detailed insight into the surface chemistry during ALD and CVD for materials combinations that are relevant for future CFET integration flows. We will investigate the surface composition of the materials and study their impact on the growth and nucleation behavior during deposition. As ALD and CVD rely on surface reactions of gas phase precursors, the deposition is sensitive to the substrate surface, which can be chemically modified to either enable or prevent growth. Surface treatments will therefore be investigated to modify the surface termination and as such manipulate the surface reactivity to enable or prevent deposition. A second research objective is to apply this insight to design ASD processes, and to study the ASD mechanism in nanoscale patterns, where the growth mechanism can be different than for regular thin film deposition. In addition, the selectivity might be affected by the patterning process due to changes in surface composition. We will leverage imec’s 300mm production line and advanced node CMOS technologies to gain access to patterned structures with topography and dimensions down to tens of nanometers in order to industrially relevant research.  

Required background: Chemistry, Physics, Materials, Nanotechnology

Type of work: 10% literature study, 90% experimental work

Supervisor: Annelies Delabie

Daily advisor: Annelies Delabie

The reference code for this position is 2022-049. Mention this reference code on your application form.