Characterization and Modeling of Ferro and AntiFerro Device

Leuven - PhD
More than two weeks ago

Explore the potential of Ferro and Antiferro devices and materials in post-Moore's systems and circuits


On the one hand, Logic scaling is getting harder and harder. As CMOS scales down to node N5 and beyond, gate length scaling becomes increasingly difficult if not impossible. The combined challenge of the gate and contact scaling has highlighted the need for innovation in device architecture and circuit design imperative. The use of ambipolar devices, vertical devices, 2D material based devices are examples of this rich space of design architecture 'revolution'.

On the other hand, Memory Scaling is also hitting a wall, and Emerging Memories solutions are considered as the only way to proceed further with the device scaling.

Ferroelectrics materials based on doped high-k materials such as hafnium or zirconium oxide are receiving increasing attention from both logic and memory communities, since they show the promise to offer both ferroelectric and antiferroelectric behavior. Those represent a valid solution for further advance Moore's law in Memory and Logic domains. Nevertheless, the physical understanding of these material behavior is not completed.

This PhD would require studying different device architectures for Memory and Logic solutions and evaluating them in terms of their circuit performance. To successfully accomplish this work, electrical characterization work in the laboratory combined with modeling effort to evaluate the device characteristics are required. Some basic TCAD  studies will be included as well to improve the physical understanding. The ultimate goal is to generate a physical based Compact Models of the ferroelectric and antiferroelectric devices, and testing the models in circuits to study the power/performance characteristics of the proposed device architecture.

Required background: Master in Electrical Engineering, Solid State Physics. Experience with electrical device characterization and/or modeling is a plus

Type of work: 15% literature, 30% device characterization, 40% compact modeling, 15% circuital simulation

Supervisor: Guido Groeseneken
Co-supervisor: Jan Van Houdt

Daily advisor: Shairfe Muhammad Salahuddin, Marie Garcia Bardon

The reference code for this position is 1812-86. Mention this reference code on your application form.


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