Leuven | More than two weeks ago
In this work, the candidate will interact with different imec groups working on technology development, material selection, TCAD simulation, compact modelling, and circuit design to identify the challenges and opportunities of low power SRAM design. The primary objectives are to come up with memory bit-cell architecture, array design, and read/write assist circuit design. The design-technology co-optimization architectures used in the work will drive the imec logic and memory technology roadmap.
Type of project: Internship, Thesis, Combination of internship and thesis
Required degree: Master of Engineering Science
Required background: Electrotechnics/Electrical Engineering
Supervising scientist(s): For further information or for application, please contact: Samantha Liu (Samantha.Liu@imec.be)