PhD - Leuven | More than two weeks ago
Memories are an essential building block for all electronic systems and great efforts are being made by the industry and academia to improve existing technologies and to invent new ones. Non-volatile data storage is leading the electronics industry today, accounting for over 80% of all transistors manufactured. An ever-expanding and diverse range of applications, such as mobile phones, personal computers, data centers and machine learning, drives a relentless increase in memory density. Advanced 3-dimensional NAND flash memory technologies have reached bit densities of ~10 Giga bit per mm2 and continued density scaling would reach bit densities of ~256 Gb/mm2 by 2028. A single memory chip of 75 mm2 would hold more than 2 Tera Byte of data and the effective bit area would be as small as 4 nm2. It is widely believed that this is the limit of conventional solid-state memories and further scaling would no longer be cost efficient.
Hence, radically new concepts of data storage and data access are needed. Prominent amongst the few available options is the storage of atomic or molecular scale objects because many can be stacked in small volumes and maintain data integrity over many years. In contrast to electrical charge, which can be transported easily through metallic wires, the manipulation of ions and molecules will require transport in liquids. One of the concepts being investigated at imec involves the selective electrochemical deposition of metal ions from liquid electrolytes to form a compositionally modulated, layered stack. With individual layers of ten atoms thick, this concept could reach bit densities beyond 1 Tb/mm2. Although a proof-of-principle has already been shown, many questions still need to be answered: What are suitable write-read techniques and how can they be realized on-chip? To what extent can the write-read operation be parallelized? How does this impact the speed characteristics? What about cycling and retention?
Imec is soliciting enthusiastic PhD candidates to explore
this non-volatile data storage technology of the future. The goal of this PhD is to further push the ‘electrolithic’
memory concept from a proof-of-principle towards a realizable, fully integrated
memory. A thorough literature study combined with in-house knowledge transfer will
be a first step to understand the concept, identify its limits and explore
promising avenues. Following steps will
be the conceptualization, modelling, design and validation of on-chip circuitry
using simulation, layout of test structures, implementation of the device into semiconductor
processes in collaboration with our technology experts, development of the
required measurement techniques and the characterization of the fabricated
Required background: Master degree in physics or electrical engineering. Knowledge of solid-state physics, electrochemistry, micro- and nanofluidics, or related is an added value.
Type of work: 15% literature, 40% modeling and circuit design, 45% experimental characterization work
Supervisor: Wim Dehaene
Co-supervisor: Maarten Rosmeulen
Daily advisor: Pieter Weckx, Senne Fransen
The reference code for this position is 2023-158. Mention this reference code on your application form.