PhD - Leuven | More than two weeks ago
In the 5G and beyond 5G mobile applications, front-end modules (FEMs) with CMOS-compatible III-V technologies have been proposed as the essential components for operating at mm-wave frequencies and meeting the requests of cost and energy efficient . Critical processes of the related co-integration between CMOS and III-V technologies have been also developed and demonstrated . However, relevant reliability investigations in these III-V FEMs are still very limited, especially for electrostatic discharge (ESD) reliability. Few prior arts have indicated that III-V devices are relatively sensitive to ESD events  and can be severely destroyed without an effective ESD protection strategy. Traditional ESD protection strategies might induce significant performance degradation on FEMs. Therefore, in-depth understanding of ESD characteristics of III-V devices will be the cornerstone for optimizing the corresponding ESD protection strategies.
Our previous works have presented that the regular 50-Ohm impedance in the TLP system might not be suitable for the GaN devices with a breakdown voltage of few-hundred voltages . Moreover, the detailed transient characteristics cannot be obtained from the general TLP IV results. The transient characteristics can bring more information, such as device turn-on mechanism and the corresponding discharging path under a real ESD event. Appropriate characterization methods are a curial part for the complete insight into the ESD challenges of III-V devices.
In addition, ESD protections in Si RF FEMs and high-speed I/O interfaces have been considered as one of the most challenging ESD topics  in past decade. The effective solutions not only relied on sophisticated co-design skills , but also on the reliable ESD protection devices. Finding reliable III-V devices can be one of the main tasks of ESD protection strategies. Even more, with the co-integration between CMOS and III-V technologies, the heterogeneous ESD protection strategy is feasible and might be a more effective solution to the FEMs in the 5G and beyond 5G mobile applications.
In this doctoral program, the fundamental ESD transient characteristics of the III-V devices will be thoroughly investigated with the proper characterization methods. Furthermore, the corresponding ESD protection options in the state-of-the-art co-integrated CMOS and III-V technologies will be evaluated and analyzed with different aspects of device characterizations, device/circuit modelling and simulations. Eventually, the decent ESD protection strategies can be proposed towards the more reliable RF FEMs for 5G mobile handset applications and even beyond.
Ref:  https://www.imec-int.com/en/imec-magazine/imec-reading-room-january-2020/heterogeneous-iii-v-cmos-technologies-for-beyond-5g-rf-front-end-modules.  B. Shankar and et al., IEEE T-ED, vol. 66, no. 9, 2019.  S.-H. Chen and et al., IEEE T-DMR, vol. 12, no. 4, 2012.  D. Linten and et al., EOS/ESD Symposium, 2009.  J. Borremans and et al., IEEE JSSC, vol. 44, no.2, 2009.
Required background: EE (III-V devices, ESD protections or RF circuit/system designs), Materials Science (III-V devices Physics) or Physics (III-V devices Physics).
Type of work: DC/RF Electrical and ESD Characterizations (40%), TCAD/Circuit simulations and modeling (30%), Analysis of Data and Results (20%), literature study (10%),
Supervisor: Patrick Reynaert
Daily advisor: Shih-Hung Chen
The reference code for this position is 2024-009. Mention this reference code on your application form.