/Evaluate instruction set architecture dependency of computer system simulations

Evaluate instruction set architecture dependency of computer system simulations

Master projects/internships - Leuven | More than two weeks ago

Explore the impact of different instruction set architectures (e.g. x86, ARM, RISC-V) on results of computer system simulators. 

To improve today’s computing devices like smartphones, laptops and high-performance servers, researchers must examine bottlenecks in application execution. Detailed architectural simulation is one alternative to gain insights into these performance bottlenecks, but it  has several drawbacks, mainly the simulation time. Application profiling is a faster way to explore and detect the hotspots of the code. And, to get the most out of profiling, it is usually required to instrument the application. 

Dynamic Binary Instrumentation (DBI) is a well-established approach for analyzing the execution of applications at the level of machine code. DBI frameworks implement a runtime system capable of modifying running applications without access to their source code. These frameworks provide Application Programming Interfaces (APIs) used by DBI tools (e.g., computer architecture simulators such as CMP$im) to plug in their specific analysis and instrumentation routines. However, these frameworks are specific to a single Instruction-Set Architecture (ISA). For instance, Pin is probably the most popular DBI framework on Intel’s architecture, but all the tools built on Pin cannot be used to analyze code running on other prominent architectures, such as Arm or RISC-V. As developing equivalent analysis tools for each ISA-specific DBI framework is a tedious and costly process, we intend to investigate how the choice of ISA affects data movement in multicore architectures. In concrete, we are interested in comparing Intel and Arm architectures.

In this master thesis internship, the candidate will analyze how the memory behavior of an application varies between an Intel x86 and an Arm 64-bit multicore architecture. To do that, the student will develop equivalent analysis tools for Pin and an Arm-specific DBI framework. One specific example of such a tool would be to implement a trace generator that captures an application memory access pattern following a standard format (like protobuf). This internship is part of an international collaboration and will be jointly supervised by researchers at imec, (Leuven, BE), LIRMM (Montpellier, FR) and UCM (Madrid, ES).
 
 

Prerequisites: excellent C/C++ programming skills and a strong background in computer architecture.

Type of Project: Internship; Thesis; Combination of internship and thesis 

Master's degree:  Master of Engineering Technology; Master of Science; Master of Engineering Science 

Duration: 6 - 9 months 

Master program:  Computer Science 

Supervising scientist(s):  Timon Evenblij, Francky Catthoor 

For further information or for application, please contact Timon Evenblij (timon.evenblij@imec.be). 

Only for self-supporting students.