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/Job opportunities/Evaluating Digital Inference Engine for suitability in High-Performance Heterogenous Inference Accelerator

Evaluating Digital Inference Engine for suitability in High-Performance Heterogenous Inference Accelerator

Research & development - Leuven | More than two weeks ago

Explore the possibilities of heterogenous inference accelerator enabled by open source inference engines.

Evaluating Digital Inference Engine for suitability in High-Performance Heterogenous Inference Accelerator


Debjyoti Bhattacharjee, Peter Debacker, Arindam Mallik


With the massive growth in size of neural networks, energy consumption of neural network inference has also risen. From a computation perspective, quantization techniques are used widely for lowering computational complexity. From the hardware perspective, analog-in-memory computing (AiMC) based solutions have grown popular in recent years. AiMC based compute cells which store the neural network weights, natively support very low precisions (often binary or ternary). AiMC based solutions have extremely high energy efficiency of the order of 1000Tops/W.


Digital inference engines offer higher flexibility of operations and high precision. From the algorithmic perspective, layers in the neural network that require higher precision can be mapped to the digital inference engine. Also, digital inference engines allow efficient processing of sparse neural network layers. These factors make it interesting to have digital and analog inference engines together in a high-performance inference accelerator.


The specific goals of this project are as follows:

  1. Study existing open-source digital accelerators such as NVDLA, SIGMA, etc.
  2. Perform comparative study of these accelerators.
  3. Integrate a model of digital accelerator into a simulation platform for running end-to-end neural network workloads, such as ResNet-20, etc.  




Mandatory: Computer Architecture, RTL (Verilog preferred), C++, familiarity with deep neural networks.


Optional: Python, Pytorch, Familiarity with EDA tools

Type of project: Thesis

Duration: upto 6 months

Required degree: Master of Engineering Technology, Master of Science, Master of Engineering Science

Required background: Electrotechnics/Electrical Engineering, Computer Science

Supervising scientist(s): For further information or for application, please contact: Debjyoti Bhattacharjee ( and Peter Debacker ( and Arindam Mallik (

Imec allowance will be provided for students studying at a non-Belgian university.