Non-volatile computing framework for high performance processing at the Edge
Master projects/internships - Leuven | More than two weeks ago
Unleashing the Future of AR/VR: Join the Frontier of Energy-Efficient Computing and Memory Advancements
Human Computer Interaction has taken a leap forward in the past decade with the advent of advanced software and hardware infrastructure and will dominate edge computing or distributed on-sensor computing paradigm for the coming years. High quality digital pixel sensors, emerging network connectivity, advent of computer vision (CV) and artificial intelligence (AI) algorithms and low-power domain-specific accelerators have funnelled the growth of virtual reality (VR) and augmented reality (AR) platforms.
The mapping of the logic, in terms of optimal partitioning of the image processing pipeline over the distributed compute architecture is one of the essential contributors to energy optimisation. Similarly, non-volatile memories have an important role to counter SRAM leakage and high on-chip storage requirements for complex deep neural network (DNN) processing. Emerging non-volatile memories eradicate leakage while promising denser arrays placed next to the computing element, or even replacing it, viz. computation in/near memory. MRAM technology is being widely explored with many variants – STT, SOT and VGSOT which could have an impact in memory access metrics for system performance. A dedicated energy management strategy is needed to capture computation workloads, the underlying dataflow, dynamic reconfigurability for mapping DNN layers to available compute resources, memory subsystem requirements and corresponding mapping to hardware resources.
The internship will involve:
- performance and energy modelling for AR/VR workloads
- propose non-volatile computing framework comprising hybrid memory organisation (NVM with SRAM) and non-volatile logic for DNN processing.
Required background: Master’s degree in electrical engineering or Computer Engineering
Type of work: 10% literature study, 25% computer architecture, 25% performance modelling, 40% digital design
Type of Project: Combination of internship and thesis
Duration: 6 - 9 months
Supervisor: Francky Catthoor
For more information or application, please contact the daily advisors Leandro Rocha (leandro.m.giacominirocha@imec.be) and Dwaipayan Biswas (dwaipayan.biswas@imec.be)
Imec allowance will be provided for students studying at a non-Belgian university.