A polarization controller is an optical device which allows one to modify the polarization state of light.
Polarization control is one of fundamental importance in many fields of photonics, including imaging, coherent optical communications, and quantum information. Compared to bulk optic devices the integration of polarization managing elements is highly challenging due to high sensitivity to fabrication imperfections and its operation. There are different ways researcher implemented the polarization splitter and rotation in integrated photonics. It was mainly done using phase matching techniques between orthogonal polarization states i.e transverse electric (TE) or transverse magnetic (TM) by changing the waveguide dimensions or additional layers [1,2].
However, controlling the polarization on-chip is much more complex. Such kind of integrated polarization rotator was proposed in , the schematic is shown in Fig. 1 (a). It contains mainly two sections the polarization rotator and the tunable phase section. The polarization rotator converts one incoming polarization to orthogonally polarize light and tunable phase section controls the polarization phase. The description of the whole device can be explained through the Poincare sphere as shown in Fig. 1 (b).
Fig 1. (a) The proposed polarization controller consists of three PRs (etched waveguide sections) and three tunable polarization phase shifters (implemented here with waveguide heaters), and (b) Evolution of state of polarization throughout the device. The input state of polarization is horizontal (point A), and the output state of polarization is right-handed circular (point G). The blue dotted lines correspond to PRs, whereas red lines correspond to tunable polarization phase shifters. The points named A through G correspond with the planes A through G .
The mentioned device was implemented through E-beam lithography and is not possible to fabricate through current wafer 193 nm Deep UV lithography technique (200 mm wafers, minimum feature size 130 nm) or later to advance (300 mm wafers) where the critical dimensions are as small as 50 nm. In order to demonstrate wafer enabled device one need to come up with a new design technique which adheres the minimum feature size. We have additional SiN layer as well in our platform which enables along with Silicon-on-insulator to make the efficient polarization rotation on-chip at 1550 nm. The additional challenge could demonstrate a similar device at a visible wavelength of 905 nm.
The student can distribute his/ her work load as follow:
- Literature survey: 15%
- Proposing a new design/ architecture of the on-chip polarization controller (if any): 15%
- Design, simulation and layout of the proposed design: 40 %
- Feasibility study of the proposed design with the mentor and integration team: 15%
- Thesis/ report writing: 15 %
 Jeong Hwan Song et al., "Si-photonics based passive device packaging and module performance," Opt. Express, vol. 19 (19), 18020-18028 (2011).
 Liu liu et al., "Silicon-on-insulator polarization splitting and rotating device for polarization diversity circuits", Opt. Express, vol. 19 (13), 12646-12651 (2011)
 J. D. Samiento-Merenguel et al., "Demonstration of integrated polarization control with a 40 dB range in extinction ratio", Optica, (2015)
Type of project: Thesis
Required degree: Master of Engineering Science
Required background: Electrotechnics/Electrical Engineering, Physics