/Performance and power analysis of emerging memory

Performance and power analysis of emerging memory

Leuven | More than two weeks ago

Use CACTI ++ for analysing cache memory sub-system (STTMRAM)

Magnetic random access memory (MRAM) has made extensive progresses to be a working cache memory solution with nonvolatility, high speed and low power consumption. Moreover, to predict the system level impact using MRAM based cache, a modelling tool is required, which uses various attributes such as access time, cycle time, power consumption (leakage/dynamic), and area. For SRAM, such tool is available like CACTI from HP labs, which uses above mentioned attributes and facilitate the system level impact. This work will focus on developing a memory macro modeling framework like CACTI which uses analytical equations, calibrated to state-of-the-art device and interconnect models from scaled technologies developed at IMEC.  

In this work the candidate will interact with different imec groups working on technology development, and design to identify the challenges with large MRAM based cache. In the large size cache, interconnects play a critical role in determining the overall delay and consume more than 50% of the energy. The primary objective of this work is to develop a CACTI like framework for MRAM based cache that will be used to estimate system level impact.


Type of project: Internship, Thesis, Combination of internship and thesis

Duration: 6-9 months

Required degree: Master of Engineering Technology, Master of Engineering Science, Master of Science

Required background: Nanoscience & Nanotechnology

Supervising scientist(s): For further information or for application, please contact: Mohit Gupta (Mohit.Gupta@imec.be)

Imec allowance will be provided.

Who we are
Accept marketing-cookies to view this content.
Cookie settings
imec's cleanroom
Accept marketing-cookies to view this content.
Cookie settings

Send this job to your email