Leuven | More than two weeks ago
In the past 20 years, the sequencing community has succeeded in reducing the cost per genome by a million-fold – from 100,000,000 to 1,000 dollar per genome. Today, the ambitious goal is to further reduce this to 10 dollar per genome.
To reach this ambitious goal, CMOS readout array ASICs are key. In large pixel-dense arrays, multiple DNA strands or proteomes can be analyzed in parallel. Looking at the traditional imaging field, 3D-stacking and advanced nodes have enabled pixel-parallel analog-to-digital conversion, meaning each pixel has its own ADC. This allows large pixel density together with high framerates. For electrochemical readout arrays, a similar approach can be taken. In this thesis, we explore an area-critical slope-ADC targeting megapixel arrays.
After studying the current literature on electrochemical readout array ADCs and imaging slope-ADCs, the first goal is to envision an appropriate architecture that fits the specifications at hand. Secondly, a transistor level design and verification cycle will concretize the ADC. Lastly, layout of the transistor level schematic will prepare for a potential tape-out.
For design, verification, and layout we use the industry standard tools (Cadence Virtuoso, Mentor Graphics Calibre) and have high computational power servers available.
Content of the thesis:
Type of project: Combination of internship and thesis
Duration: 9 months
Required degree: Master of Science
Required background: Electrotechnics/Electrical Engineering
Imec allowance will be provided for students studying at a non-Belgian university.