PostDoc | More than two weeks ago
Are you interested in the development, realization and test of analog and/or mixed-signal integrated circuits using a deeply scaled CMOS (e.g. FinFET or FDSOI) process? Come and join us!
The Design group of IDLab, Ghent University and imec is seeking a postdoctoral researcher to join its newly established High-Speed and Coherent Transceiver Research Programs. The researcher's responsibilities covers integrated circuit design using scaled (e.g. FinFET) CMOS processes, targeting building blocks such as >100Gbaud capable clock-and-data recovery circuits, broadband driver and amplifier circuits, front-end parts for high-speed ADCs.
Optical transceivers with capacities as high as 100G and even 400G are now widely used inside data centers to connect servers arranged in racks with high-capacity switches. Such bandwidths are realized through space or wavelength division multiplexing, combined with multilevel modulation (e.g. 400G using 4x 50Gbaud PAM-4). New software applications such as artificial intelligence (AI) continues the drive for ever more powerful data centers, which in turn drives the need for higher capacity optical links. Industry is now seriously considering 800G and even >1Terabit optical transceivers for these applications. The initial approach of adding more channels is usually not cost-effective, and hence research is now focusing on realization of optical transceivers using >100Gbaud opto-electronics. Such baudrates will require a new generation of underlying electronic building blocks implemented using scaled CMOS. The group is therefore seeking a postdoctoral researcher with following responsibilities:
Development, realization and test of analog and/or mixed-signal integrated circuits using a deeply scaled CMOS (e.g. FinFET or FDSOI) process, including but not limited to for example:
Perform or support the measurements required to evaluate the performance of the fabricated integrated circuits. If required this may include the realization of required supporting material such as high-speed capable printed circuit boards, ceramic, interposers etc.
The successful candidate will join an internationally renowned team of high-speed electronic integrated circuit designers. He or she will get the opportunity to realize and shape the Design group’s roadmaps towards next-generation optical transceivers with >100Gbaud symbol rates. The successful candidate will be provided every opportunity to publish the outcomes of their research work at high-impact international conferences and leading journals, both in the area of IC design as well as optical fiber conferences.
This position is available for a definite duration of two years initially, and can be extended pending funding applications.
Apply by sending an email to Prof. Guy Torfs.
For more information mail to email@example.com