The objective of this postdoc topic is to research efficient compute hardware together with closely coupled software methods and tools. While, the success of AI in the last decade, was originally made possible by advances in hardware and compute power, the cost and complexity of the popular AI algorithms is constantly growing in an non sustainable manner. With more complex neural network architectures and applications arising each month, the computational footprint of novel state of the art neural networks is growing with a factor 100 every two years, far surpassing. Moore’s law.  As such, the pace of traditional hardware development cannot match and will become a bottleneck for the field of AI to further advance. There is thus a need for the adoption novel compute paradigms, AI accelerators and hardware software co-design efforts.

You will work together with imec’s hardware teams to create novel hardware efficient AI algorithms. Key will be the adoption in your work of hardware paradigms which can facilitate the creation of new AI accelerator paradigms, like probabilistic bits or analog in-memory compute. While your work will start at the level of algorithmic development, it will be necessary to also consider more circuit or architecture aspects to come up with a workable system-level approach. Additionally, studying new neuron models that allow for low-power and low-latency compute can also be in scope (e.g., spiking neural networks). 

Given the focus on hardware software co-design, you should have an interest in both the software and the hardware domains and should be able to conceptually bridge both areas. Experience with concepts like probabilistic compute is considered a plus. Additionally, an understanding of different types of algorithms and architectures is a must. Examples of relevant algorithms are Bayesian neural networks / models, probabilistic graph models, binary neural networks, and spiking neural networks. Note that while your initial focus will be on the fundamental research and algorithmic design, we do expect that you will explore the links to application domains. These application domains can be diverse, but we foresee initial applications in the automotive sector, robotics, and traffic management. This challenge will be to do this in an efficient and realistic manner, considering different constraints like power consumption, cost, latency, ... This objective requires to map the different parts of the ML processing pipeline to computational components whose architectures are best suited to the domains under study.

We will focus on the following research questions, which will be refined during your stay at imec, together with you: 

You will work with teams from various parts of imec, working in a highly applied way towards contributions related to imec’s incubating edge AI program. You will also contribute to the definition of the research roadmap and will get the opportunity to support junior researchers. The focus of your research will be on addressing the above research questions through the creation and evaluation of real-world demonstrators with industrial clients in either the automotive, traffic management, robotics, or life sciences domains. You will join the imec AI group (EDiT), which focusses on research and engineering in the domain of Edge AI. The team is multidisciplinary and highly international, composed of talent with skills in ML algorithms, sensor fusion techniques, MLOps pipelines and general application development. EDiT is currently a team of around 100 people, operating from the imec offices in Ghent, Antwerp and Leuven. Its main emphasis is on software/hardware co-design and your work will be part of an ongoing effort for disruptive innovation through creative collaboration between the hardware and software departments at imec.  

The following papers are indicative of the intended research scope: