Postdoctoral Researcher hardware efficient and edge AI
The objective of this postdoc topic is to research efficient compute hardware together with closely coupled software methods and tools. While, the success of AI in the last decade, was originally made possible by advances in hardware and compute power, the cost and complexity of the popular AI algorithms is constantly growing in an non sustainable manner. With more complex neural network architectures and applications arising each month, the computational footprint of novel state of the art neural networks is growing with a factor 100 every two years, far surpassing. Moore’s law. As such, the pace of traditional hardware development cannot match and will become a bottleneck for the field of AI to further advance. There is thus a need for the adoption novel compute paradigms, AI accelerators and hardware software co-design efforts.
You will work together with imec’s hardware teams to create novel hardware efficient AI algorithms. Key will be the adoption in your work of hardware paradigms which can facilitate the creation of new AI accelerator paradigms, like probabilistic bits or analog in-memory compute. While your work will start at the level of algorithmic development, it will be necessary to also consider more circuit or architecture aspects to come up with a workable system-level approach. Additionally, studying new neuron models that allow for low-power and low-latency compute can also be in scope (e.g., spiking neural networks).
Given the focus on hardware software co-design, you should have an interest in both the software and the hardware domains and should be able to conceptually bridge both areas. Experience with concepts like probabilistic compute is considered a plus. Additionally, an understanding of different types of algorithms and architectures is a must. Examples of relevant algorithms are Bayesian neural networks / models, probabilistic graph models, binary neural networks, and spiking neural networks. Note that while your initial focus will be on the fundamental research and algorithmic design, we do expect that you will explore the links to application domains. These application domains can be diverse, but we foresee initial applications in the automotive sector, robotics, and traffic management. This challenge will be to do this in an efficient and realistic manner, considering different constraints like power consumption, cost, latency, ... This objective requires to map the different parts of the ML processing pipeline to computational components whose architectures are best suited to the domains under study.
We will focus on the following research questions, which will be refined during your stay at imec, together with you:
- How can hardware paradigms like probabilistic computing contribute to more efficient AI algorithms?
- How can these algorithms make use of the latest generation of AI accelerator chips?
- What algorithms and application domains are deemed the most promising for adoption of these novel paradigms?
You will work with teams from various parts of imec, working in a highly applied way towards contributions related to imec’s incubating edge AI program. You will also contribute to the definition of the research roadmap and will get the opportunity to support junior researchers. The focus of your research will be on addressing the above research questions through the creation and evaluation of real-world demonstrators with industrial clients in either the automotive, traffic management, robotics, or life sciences domains. You will join the imec AI group (EDiT), which focusses on research and engineering in the domain of Edge AI. The team is multidisciplinary and highly international, composed of talent with skills in ML algorithms, sensor fusion techniques, MLOps pipelines and general application development. EDiT is currently a team of around 100 people, operating from the imec offices in Ghent, Antwerp and Leuven. Its main emphasis is on software/hardware co-design and your work will be part of an ongoing effort for disruptive innovation through creative collaboration between the hardware and software departments at imec.
What we do for you
We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.
We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth.
We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a competitive salary with many fringe benefits.
The following papers are indicative of the intended research scope:
- [Vogginger2022] Vogginger B, Kreutz F, López-Randulfe J, Liu C, Dietrich R, Gonzalez HA, Scholz D, Reeb N, Auge D, Hille J, Arsalan M, Mirus F, Grassmann C, Knoll A and Mayr C (2022) Automotive Radar Processing With Spiking Neural Networks: Concepts and Challenges. Front. Neurosci. 16:851774. doi: 10.3389/fnins.2022.851774
- [Knobloch2022] Neuromorphic AI - An Automotive Application View of Event Based Processing, K. Knobloch, P. Gerhards, Infineon Development Center Automotive Electronics & AI 2022-06-29
- [Cordone2022] Cordone, L., Miramond, B., & Thiérion, P. (2022). Object Detection with Spiking Neural Networks on Automotive Event Data. 2022 International Joint Conference on Neural Networks (IJCNN), 1-8.
- [Kim2020] Kim, Seijoon, Seongsik Park, Byunggook Na and Sungroh Yoon. “Spiking-YOLO: Spiking Neural Network for Energy-Efficient Object Detection.” AAAI (2020).
- [Xiang2022] Xiang, S.; Jiang, S.; Liu, X.; Zhang, T.; Yu, L. Spiking VGG7: Deep Convolutional Spiking Neural Network with Direct Training for Object Recognition. Electronics 2022, 11,2097. https://doi.org/10.3390/ electronics11132097
- [Safa2021] Safa, Ali & Corradi, Federico & Keuninckx, Lars & Ocket, Ilja & Bourdoux, Andre & Catthoor, Francky & Gielen, Georges. (2021). Improving the Accuracy of Spiking Neural Networks for Radar Gesture Recognition Through Preprocessing. IEEE Transactions on Neural Networks and Learning Systems. PP. 1-13. 10.1109/TNNLS.2021.3109958.
- [Tsang2021] Tsang,I.J.;Corradi,F.; Sifalakis, M.; Van Leekwijck, W.; Latré, S. Radar-Based Hand Gesture Recognition Using Spiking Neural Networks. Electronics 2021, 10, 1405. https://doi.org/10.3390/electronics 1012
- [Stuijt2021] μBrain: An Event-Driven and Fully Synthesizable Architecture for Spiking Neural Networks, Front. Neurosci., 19 May 2021 https://doi.org/10.3389/fnins.2021.664208
- [Schuman2022] Schuman, C.D., Kulkarni, S.R., Parsa, M. et al. Opportunities for neuromorphic computing algorithms and applications. Nat Comput Sci 2, 10–19 (2022). https://doi.org/10.1038/s43588-021-00184-y
- [Tavanaei2019] Tavanaei, Ghodrati, Kheradpisheh, Masquelier, Maida, Deep learning in spiking neural networks, Neural Networks, Volume 111, 2019, PP 47-63, https://doi.org/10.1016/j.neunet.2018.12.002.
- [Mei2021] Mei, L., Houshmand, P., Jain, V., Giraldo, S., & Verhelst, M. (2021). Zigzag: Enlarging joint architecture-mapping design space exploration for dnn accelerators. IEEE Transactions on Computers, 70(8), 1160-1174.
- [Keuninckx2018] Keuninckx, L., Danckaert, J., & Van der Sande, G. (2018). Monostable multivibrators as novel artificial neurons. Neural Networks, 108, 224-239.
- [Debashis2022] Debashis, P., Li, H., Nikonov, D., & Young, I. (2022). Gaussian Random Number Generator With Reconfigurable Mean and Variance Using Stochastic Magnetic Tunnel Junctions. IEEE Magnetic Letters, 13, 1-5.