Research & development - Leuven | More than two weeks ago
Historically CMOS technology is developed based on the one-fits-all concept where the back-end of line (BEOL) and front-end of line (FEOL) are designed in a way that the technology can satisfy the requirements of various circuit blocks such as embedded memory, logic circuits, I/O circuits. The aggressive poly-pitch and metal-pitch scaling forces to adopt novel materials for BEOL interconnect and new device structures and/or materials for FEOL. These new device and interconnect concepts are dramatically reshaping the fundamental concept of CMOS circuit design. For example, increasing the size of a driver for improving the speed of a circuit which delay is dominated by the BEOL resistance could be inefficient. It is therefore important to understand how BEOL and FEOL contribute to the system performance. This understanding would allow the development of customized BEOL and FEOL to meet the performance requirements of various circuit blocks and heterogeneously integrate them in a 3D IC for attaining benefits from system PPA. Fine-grain system partition would require aggressive scaling of 3D interconnect pitch which can be achieved by sequential 3D technology.
Research the impact of BEOL and FEOL on system performance in emerging CMOS technologies.
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This postdoctoral position is funded by imec through KU Leuven. Because of the specific financing statute which targets international mobility for postdocs, only candidates who did not stay or work/study in Belgium for more than 24 months in the past 3 years can be considered for the position (short stays such as holiday, participation in conferences, etc. are not taken into account).