/Power efficient SoC design with sheet width modulation

Power efficient SoC design with sheet width modulation

Leuven | More than two weeks ago

Leveraging state-of-the-art device processing and EDA methodology, maximize the power efficiency of a heterogeneous SoC without penalizing the performance.
Modern chips are highly heterogeneous, consisting of many smaller sub-blocks each with its own functionality. The entire system's performance is determined mainly by only a few of these blocks, depending on the workload and target application. The optimization of the performance and the chip's total power are mutually exclusive, as higher frequencies inherently imply higher power consumption.

The main idea behind this work is to rely on all the non-critical sub-blocks of a highly heterogeneous SoC architecture, to optimize the chip's power efficiency, without having an impact on the achieved frequency. This is made possible by combining two different flavors of the same sheet-based device, one optimized for high drive strength, and the other for low power, for the design of the time-critical blocks. All the other circuits can be implemented using only low-power devices to minimize the full chip's global power consumption.

The student can rely on imec's cutting-edge technology development and commercial EDA infrastructure to physically implement an entire SoC with the described width modulation (or w-mixing) methodology. The project includes:

  • Device and circuit level work (30%), where the student will need to investigate how the device capacitance scales with the sheet width, potentially for different device architectures. 
  • A basic study of the system architecture (10%) to understand how the chosen SoC and its sub-blocks work, and which ones of them are timing-critical
  • Physically implement an industry-relevant SoC (60%) using both devices from the previous step, as well as combining the two together.   

Type of project: Combination of internship and thesis, Internship

Duration: 6 Months

Required degree: Master of Science

Required background: Electrotechnics/Electrical Engineering, Computer Science

Supervising scientist(s): For further information or for application, please contact: Giuliano Sisto (Giuliano.Sisto@imec.be)

Imec allowance will be provided.

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