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/Job opportunities/Reliability-physics based hardware primitives for tamper-free cryptographic applications

Reliability-physics based hardware primitives for tamper-free cryptographic applications

PhD - Leuven | More than two weeks ago

Apply reliability physics to develop hardware implementations for more lightweight security solutions as well as improved robustness against post-quantum cryptographic threats

Cryptographic algorithms and protocols are essential for protection of data during storage, transmission and processing. Research challenges in this domain rely in developing more lightweight solutions (e.g. for low power and cost IoT applications) as well as improving robustness against post-quantum threats (hypothetical attacks by computationally powerful systems).

Utilizing dedicated hardware implementations for typical security primitives is advantageous as it offers an extremely strong root of trust. Some of such hardware-based roots of trust recently gaining a lot of attention are physically unclonable functions (PUF), true random number generators (TRNG) and "silicon odometers".

A PUF provides a chip with a unique static feature, i.e. a chip fingerprint, which cannot be remanufactured and hence can be used to identify this specific chip. Conventionally, a PUF harvests the static entropy from random process variation of the devices or interconnects, to generate the unique chip fingerprint. On the other hand, the entropy in TRNG is harvested from the dynamic stochastic processes occurring during operation, such as thermal noise and charge trapping.

A reliable age monitoring system can be provided by understanding the deterministic features of IC degradation (analogous to odometers in cars that indicate the wear and tear on the vehicle) to prevent chip recycling and reselling. In other words, one can derive the actual usage of the chip, i.e. distinguishing chips that might have been unused in storage from those that might have been overused, e.g., by overclocking.

Although some implementations of silicon odometers have been proposed using degradation mechanisms such as Biased Temperature Instability (BTI), Hot-carrier Injection (HCI) or Electromigration (EM) [1-2], these implementations, however, do not provide resilience against tampering. Since most of the degradation mechanisms can be recovered to some extent, vectors may exist for tampering the recorded aging information. One example is the odometer based on ring oscillators (RO)--the oscillation frequency can reflect the amount of hot-carrier injection (HCI) degradation caused by operation. HCI degradation typically only worsens with time, but can be also partially reversed by a tamperer due to an effect called thermal curing (e.g., by baking the chip at high temperature).

The student candidate will perform a comprehensive study on the reliability physics and investigate different types of degradations, allowing to exploit degradation features to conceive hardware primitives for PUFs or TRNGs, or to develop more precise silicon odometers and elaborate robust countermeasures for physical tampering.

Ref. 1: J. Keane, X. Wang, D. Persaud, C.H. Kim. 2010. An All-In-One Silicon Odometer for Separately Monitoring HCI, BTI, and TDDB. In IEEE Journal of Solid-State Circuits, vol. 45, no. 4, pp. 817-829.

Ref. 2: X. Wang, J. Keane, T.T. Kim, P. Jain, Q. Tang, C.H. Kim. 2014. Silicon Odometers: Compact In Situ Aging Sensors for Robust System Design. in IEEE Micro, vol. 34, no. 6, pp. 74-85.





Required background: Electronic Engineering, Physics

Type of work: 60% characterization,30% design, 10% literature

Supervisor: Ingrid Verbauwhede, ,

Daily advisor: Erik Bury

The reference code for this position is 2020-058. Mention this reference code on your application form.

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