RISC-V CPU Modeling Engineer
What you will do
System Architecture innovations are key to position imec for success in fast evolving workloads of tomorrow and to differentiate imec’s process technology innovations with system level value proposition. The Compute System Architecture Unit at imec leads research into futuristic high-performance and highly-secure RISC-V CPUs to extend imec’s semiconductor research leadership deep into the next decade. This unit is also researching accelerator-based architectures for next-generation Artificial Intelligence (AI), compute-in-memory architectures and heterogeneous memory systems. The team is responsible for architecture definition of new CPU and accelerator capabilities, analyzing emerging usage models, and building hardware and software prototypes for data-driven computing hardware.
As we expand our research to better optimize computing, we are looking for a RISC-V CPU Modeling Engineer to contribute hands-on to the development of prototypes and performance models for high performance RISC-V CPU. The candidate will be responsible for implementing and integrating detailed functional simulations of computer systems in close collaboration with other groups responsible for designing and developing these computer systems. In addition, the candidate will also be responsible for maintaining and improving performance simulation models with additional functionality and better user experience. He or she will work closely with partners to identify and customize infrastructure and workloads to inform and influence future technology definition.
Performance and Functional simulator is a critical tool for architecture exploration and providing a reference model for validation and early development of software stack of the CPU. In this position, you will be responsible for design, coding, validation of the CPU simulator. The job will involve intense engagements with architects, RTL and software development teams. As CPU use-models expand into new areas of Deep Learning, Machine learning, Media servers, Augmented/ Virtual reality, etc - this position offers unique opportunity to impact these emerging application areas.
- Developing functional/performance model of high performance In Order and OOO RISC-V cores in C++ or System C.
- Driving software architecture changes for scalable design and maintainability.
- Architect system simulator to improve runtime software performance.
- Provide innovative architectural solutions to complex problems.
- Modeling RISC-V CPU features in the model and validating them.
- Developing test plans, test writing and validating the reference models.
- Working with the architecture, design and software teams for debugging issues and resolving them
- Generating and securing IP.
- Keeping up-to-date on recent developments in the field. You do this by studying literature and interacting with your colleagues.
What we do for you
We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.
We are proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth.
We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a competitive salary with many fringe benefits.
Who you are
You have a Bachelors/ Masters or PhD degree in Computer Science / ECE with 2-10 years of experience in related areas.
Additional qualifications include:
- Strong programming experience in C/C++ or System C and familiar with scripting languages.
- Software performance tuning experience is desired.
- Computer Architecture knowledge.
- Prior experience in Simulator development.
- Strong analytical and problem-solving skills. Ability to multitask.
- Ability to work in dynamic and team-oriented environment.
- Familiarity with ASIC design flow, validation concepts, coverage, etc. is desirable.