Simulation and experimental validation of metal diffusion and voiding in nano-interconnects

Leuven - PhD
More than two weeks ago

Predict the reliability of novel nanowires using simulations


Metallic conductors in an electronic chip endure mechanical stresses due to fabrication processes and also due to operating conditions such as high current densities and temperatures. The mechanical stresses and stress gradients can result in diffusion of metal ions leading to dynamic events such as void formation in the nano-wires and growth/migration of the voids with detrimental consequences for chip reliability. Many factors such as the type of metals and interfaces, their grain structure, operating conditions and also the length-scale are evolving. Therefore, this PhD project aims to develop models that enable fundamental quantitative exploration of these factors at the nano-scale.

The candidate will have access to the existing experimental data at imec and will conduct further characterization experiments to obtain the parameters required as input for the simulations and to validate the numerical findings. This includes characterization of materials and interfaces at micro/nano length scales such as their structure, elastic, diffusive and adhesive/cohesive properties by means of nano-indentation, fracture mechanics techniques and also metallurgical analysis such as analysis of grain structure in the nano-interconnects.

The position is best suited for candidates from mechanical engineering, material science/engineering, physics, or similar disciplines preferably with interest and background in numerical modelling, specifically finite element modelling (FEM). Experience with a FEM software such as COMSOL, Abaqus, Marc-Mentat is of added value. Hands-on knowledge of a programming language (exp. MATLAB, C, Python, Java, etc.) is necessary. The candidate should be interested in multidisciplinary research.


Related reading:

[1] P.S. Ho, Motion of inclusion induced by a direct current and a temperature gradient, Journal of Applied Physics 41 (1970) 64-68.

[2] M Kraatz, M Gall a, E Zschech, D Schmeisser, P.S. Ho, A model for statistical electromigration simulation with dependence on capping layer and Cu microstructure in two dimensions, Computational Materials Science 120 (2016) 29.

[3] H. Ceric, R.L. de Orio, J. Cervenka, and S. Selberherr, Copper microstructure impact on evolution of electromigration induced voids, Simulation of Semiconductor Processes and Devices, 2009. SISPAD '09. DOI:  10.1109/SISPAD.2009.5290222.

[4] Nabiollahi N., Moelans N., Gonzalez M., De Messemaeker J., Wilson C., Croes K., Beyne E., De Wolf I. (2015). Microstructure simulation of grain growth in Cu through silicon vias using phase-field modeling. Microelectronics Reliability, 55, 765-770.

[5] Q. M. Yu, Influence of the stress state on void nucleation and subsequent growth around inclusion in ductile material, Int J Fract 193 (2015) 43–57.

Type of work: 10% Literature and technological study, 70% modelling/simulation, 20% experimental characterization

Promotor: Prof. Ingrid De Wolf

Daily advisor: Dr. Houman Zahedmanesh

Required background: Mechanical engineering, material science, physics, or similar disciplines

Type of work: 10% Literature and technological study, 70% modelling/simulation, 20% experimental characterization

Supervisor: Ingrid De Wolf

Daily advisor: Houman Zahedmanesh

The reference code for this position is 1812-07. Mention this reference code on your application form.


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