/Student Project: Low-phase-noise PLL techniques for multi-standard energy-efficient RF transceivers

Student Project: Low-phase-noise PLL techniques for multi-standard energy-efficient RF transceivers

Research & development - Eindhoven | More than two weeks ago

Next-generation IoT applications have been posing new challenges for frequency synthesizers (or PLLs), such as lower phase noise, wider tuning range, and accurate multiple phases, while requiring low power consumption. In this project, you will address these challenges through exploring new analog/RF/digital techniques and proposing solutions to a state-of-the-art frequency synthesizer for energy-efficient RF transceivers.

Student Project: Low-phase-noise PLL techniques for multi-standard energy-efficient RF transceivers

Next-generation IoT applications have been posing new challenges for frequency synthesizers (or PLLs), such as lower phase noise, wider tuning range, and accurate multiple phases, while requiring low power consumption. In this project, you will address these challenges through exploring new analog/RF/digital techniques and proposing solutions to a state-of-the-art frequency synthesizer for energy-efficient RF transceivers.

What you will do

You will be working on the design of a PLL or its most critical building block – the oscillator. You will carry out the works with the following steps:

  • Literature studies and discussions on state-of-the-art PLL/oscillator circuits.
  • Circuit or system design and implementation.
  • Layout and post-layout simulation.
  • In the case of a high-quality work, making design into a fabricated test chip (tape-out).

What we do for you

As the world-best research institute, we are the center of the excellence in nano-electronics design. In this internship project, you will be working on the cutting-edge research project, under the supervision of the world-renown researchers with diverse backgrounds. 

Who you are

  • An MSc student eligible to do an internship in the Netherlands.
  • Available for a period of 9-12 months.
  • Very interested in this project and eager to realize high-performance circuits.
  • Able to work independently and to expand knowledge in the field.
  • With knowledges of CMOS circuits and feedback loops.
  • Understanding the principle of an analog or digital PLL.
  • With good analytical skills (e. g. mathematical skills, logical thinking, etc.).
  • With good CAD skills (e. g. MATLAB/Simulink, Verilog, Python, Cadence, etc.).
  • With good written and verbal English skills.

Interested

Does this project sound like an interesting next step in your career at imec? Don’t hesitate to submit your application by clicking on ‘APPLY NOW’.
Should you have more questions about the project and the recruitment process? Martijn Kohl of the Talent Acquisition Team will be happy to assist you.

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