Thermal management of integrated CMOS-Si photonics Optical Transceivers

Leuven - PhD
More than two weeks ago

Solve the thermal issues for co-packaged optics with high power chips and Si photonics to enable high bandwidth solutions required for future data centers


The requirements for package-to-package input-output (I/O) interfaces in future high-performance computing systems scale up to multiple Terabytes per second. The traditional scaling of I/O's using electrical links for data transmission faces many bottlenecks such as pin count and bandwidth-distance-power trade-off. The advantages of Si photonics, very high bandwidth and low propagation loss and delay, allow the implementation of in-package optical transceiver modules with a direct interface to CMOS chips by using integrated silicon photonics modulators and detectors. Recent advanced packaging technologies allow the tight integration of Si photonics transceiver technology with the host IC in a single chip package. These co-packaged optics enable the high bandwidth required for future data centers as well as the reduction of the package footprint. The Si photonic elements are however significantly affected by changes in local and ambient temperature variations, e.g. caused by the highly non-uniform power generation in the ASIC or FPGA CMOS chip, the laser sources, and the optical devices themselves. Temperature changes can cause a wavelength shift which leads to an optical power loss due to wavelength mismatch and to laser power degradation, which introduces more challenges for the thermal management of these co-packaged optics.

The objective of this PhD is to address the fundamental thermal management challenges for these integrated packages that contain a high-power host IC (FPGA or ASIC), Si photonics chips with integrated silicon photonics modulators and detectors and memory modules (HBM or HMC). A successful and efficient cooling solution for the integrated packages should meet the following requirements:

  • Keep the temperature of the host IC below the specified temperature;
  • Limit the thermal coupling between host IC and Si photonics modulators and detectors and the memory modules;
  • Be compatible the advanced packaging technologies.

In this PhD work, the following activities are foreseen:

  • Modeling of the thermal behavior of the integrated package. This tasks research involves the development of a multi-scale modeling framework to couple the electrical, thermal and optical fields in order to assess the extent of the thermal impact on the optical link between laser, modulator, waveguide and detector. The modeling scales range from the cm-level, including the chip package and the impact of the cooling solution and boundary conditions, down to the µm-level of the integrated optical devices.
  • Identification of the cooling needs and constraints for the cooling solutions of test cases for the integrated packages.
  • Development of a demonstrator of the cooling solution on a test vehicle for the validation of the developed model and for the thermal and optical characterization of the system.​

Required background: Engineering Science (Mechanical, Electrical, Material Science, Energy, ...) , Science (Physics, Chemistry, Mathematics)

Type of work: 10% literature study, 40% modeling, 40% experimental analysis, 10% reporting in meetings, conferences and journals

Supervisor: Ingrid De Wolf

Daily advisor: Herman Oprins

The reference code for this position is 2020-033. Mention this reference code on your application form.


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