/Ultrafast spin torque-based magnetic memories for high-speed embedded devices

Ultrafast spin torque-based magnetic memories for high-speed embedded devices

Leuven | More than two weeks ago

Investigate the reversal mechanisms of novel SOT-based MRAM and aid in their development towards reality!

As semiconductor scaling progresses towards the sub-10nm nodes, conventional memories such as Static RAM (SRAM) and Dynamic RAM (DRAM) face significant challenges in scaling due to increased leakage, high standby power and increased parasitics. Magnetic random access memory (MRAM) is a non-volatile memory technology that can potentially replace conventional memories at several levels in the memory hierarchy owing to their favourable characteristics including low power consumption, negligible leakage and high endurance.

 

Spin orbit torque-driven MRAM (SOT-MRAM) is one such flavour of MRAM that has demonstrated sub-ns switching speeds [1], and a significant area benefit over existing SRAM solutions. Imec has been the first demonstrator of SOT-MRAM technology at 300mm manufacturing scale while maintaining backend-of-line (BEOL) compatibility. However, the required current densities (and therefore, power) for writing SOT-MRAM devices are still quite high (~107 A/cm2) today. In addition, an external magnetic field is typically required during the write operation to break the inherent symmetry of the spin orbit torque. These factors limit the commercialization of this technology and require urgent solutions.

 

These challenges can be overcome through innovative write scheme designs. One such write scheme combines spin transfer torque (STT) and spin orbit torque (SOT) write mechanisms. By combining these two phenomena, we can demonstrate lower switching current densities and magnetic field-free switching. In this Master’s internship (and thesis), you will investigate the reversal mechanism of this combined write scheme through a combination of simulations (macrospin and/or micromagnetics) and experiments. As this is a novel scheme proposal, significant contributions can be made in both simulation and experimental domains, and the focus on both equally or on one of them will depend on the candidate’s interest and profile.


Type of project: Combination of internship and thesis

Duration: 6 - 9 months

Required degree: Master of Engineering Technology, Master of Science, Master of Engineering Science

Required background: Electrotechnics/Electrical Engineering, Materials Engineering, Nanoscience & Nanotechnology, Physics

Supervising scientist(s): For further information or for application, please contact: Vaishnavi Kateel (Vaishnavi.Kateel@imec.be) and Maxwel Gama Monteiro (Maxwel.GamaMonteiro@imec.be) and Siddharth Rao (Siddharth.Rao@imec.be)

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