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/Job opportunities/Voltage-controlled magnetic anisotropy: MRAM above GHz operation with ultra-low power consumption

Voltage-controlled magnetic anisotropy: MRAM above GHz operation with ultra-low power consumption

PhD - Leuven | More than two weeks ago

Join imec’s research on MRAM, the promising novel memory device and VCMA will make the breakthrough in MRAM.

Magnetic random access memory (MRAM) has made extensive progresses to be a working memory solution with nonvolatility, high speed and low power consumption, exploiting spin-transfer torque (STT) as the key ingredient for fully electric operation. However, STT writing requires a substantial amount of spin-polarized currents flowing through the oxide barrier of a magnetic tunnel junction (MTJ), which ends up in the limitation to reduce the power consumption. Such intense tunneling current can also degrade the barrier of magnetic tunnel junctions (MTJ) to affect the reliability of memory cells. Moreover, STT writing can hardly achieve the speed faster than GHz regarding the general dynamics of magnetization in ferromagnetic layer.

One method to make advances in MRAM is spin-orbit torque (SOT) using spin Hall effect (SHE), where in-plane charge current flowing in a nonmagnetic layer generates a vertical spin current, leading to the magnetization reversal of the adjacent magnetic layer [1]. Voltage-controlled magnetic anisotropy (VCMA) is another promising method to enable ultra-low power writing operations [2]. It reduces the interfacial perpendicular magnetic anisotropy (PMA) with an electric field, or a voltage across the barrier in MTJ. Switching of magnetization by eliminating the PMA using voltage pulse without current is the key aspect of VCMA. It can also be combined with other writing scheme to be more efficient [3].

VCMA switching in MTJ device is being highlighted as the breakthrough for the novel writing scheme of MRAM. Intensive efforts have been made to understand the fundamental aspects of VCMA operation. However, there are still important characteristic parameters remain to be explored for VCMA to be the applicable write scheme. First, the voltage of write pulse should be controllable, and be reduced keeping sufficient data retention time. Enhancement in VCMA coefficient is the most substantial solution and can be studied by MTJ stack engineering. Moreover, modulation in write pulse scheme can be studied as a solution for more efficient switching rather than a single pulse. Second, for more reliable write operation, have to suppress the write error rate (WER). Typically, in MRAM devices, application of higher pulse voltage reduces WER. However, characteristics of WER specifically for VCMA is not sufficiently explored yet, such as the origins and relevant correlations, and feasible model based on those. Furthermore, the reliability of the device such as dielectric breakdowns and endurances is also required to be studied in the regime of VCMA operation. MTJ devices for VCMA generally have much thicker barrier than those for STT to suppress the tunneling current, but they experience higher voltage with shorter pulse width. Those characteristics of reliability are important for the decision of the write margin.

[1] I. M. Miron et al., Nature 476, 189 (2011)
[2] T. Maruyama et al., Nat. Nanotechnol. 4, 158 (2009)
[3] H. Yoda et al., IEEE IMW (2017)​

Required background: solid state physics, material science, electrical engineering, fundamentals in spintronics

Type of work: 40% device electrical testing, 30% data analysis, 20% device modeling and design, 10% literature

Supervisor: Guido Groeseneken

Daily advisor: Woojin Kim

The reference code for this position is 2020-017. Mention this reference code on your application form.
Chinese nationals who wish to apply for the CSC scholarship, should use the following code when applying for this topic: CSC2020-10.

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