CMOS and beyond CMOS
Discover why imec is the premier R&D center for advanced logic & memory devices. anced logic & memory devices.
Connected health solutions
Explore the technologies that will power tomorrow’s wearable, implantable, ingestible and non-contact devices.
Life sciences
See how imec brings the power of chip technology to the world of healthcare.
Sensor solutions for IoT
Dive into innovative solutions for sensor networks, high speed networks and sensor technologies.
Artificial intelligence
Explore the possibilities and technologies of AI.
More expertises
Discover all our expertises.
Research
Be the first to reap the benefits of imec’s research by joining one of our programs or starting an exclusive bilateral collaboration.
Development
Build on our expertise for the design, prototyping and low-volume manufacturing of your innovative nanotech components and products.
Solutions
Use one of imec’s mature technologies for groundbreaking applications across a multitude of industries such as healthcare, agriculture and Industry 4.0.
Venturing and startups
Kick-start your business. Launch or expand your tech company by drawing on the funds and knowhow of imec’s ecosystem of tailored venturing support.
/Job opportunities/Wet-chemical atomic layer etching of metals for advanced chip interconnects

Wet-chemical atomic layer etching of metals for advanced chip interconnects

PhD - Leuven | More than two weeks ago

Advancing future interconnects by nanoscale metal etching

To produce chips, the semiconductor industry starts with the first few layers containing the 'active' elements (transistors) which are then electrically connected via nanometer-sized metal lines. For this so-called 'damascene' metallization, barrier | liner | seed stacks, such as TaN | Ru | Cu, are used in which ruthenium (Ru) ensures a good adhesion of the copper (Cu) seed layer on the tantalum nitride (TaN) barrier. Afterwards, the structures are filled with Cu by electrochemical deposition. For the typically 10-20 metallization layers, Cu constitutes the largest material fraction as conductor to connect all transistors of the chip. Over the past tens of years, the industry managed to increase chip performance by increasing the number of transistors on the chip as well as decreasing the size of metallization lines enormously. However, some material properties of Cu make it not reliable anymore for more performant chips which have lines of only a few nanometer wide. Therefore, various alternative metals, such as ruthenium and molybdenum, are considered. Selective, wet-chemical removal of only a few nanometers of Ru in 'damascene' trenches which preserves surface roughness and developing an extremely controlled and reproducible process, is critical to enable future advanced interconnect technologies.  

In the project, the PhD student will develop wet-chemical etching processes and study the (electro)chemistry involved, characterize the results in terms of surface roughness, selectivity, and etch rate as well as study the impact of surface chemistry, thermal treatments and crystal orientation on the dissolution behaviour. The lab work focuses on developing a better understanding first, eventually enabling the transferability to wafer level. Candidates should have a background in materials science with a strongly developed knowledge of chemistry.  ​



Required background: Materials Science - Chemistry

Type of work: 75% experiments, 25 % interpretation

Supervisor: Philippe Vereecken, ,

Daily advisor: Harold Philipsen

The reference code for this position is 2020-014. Mention this reference code on your application form.

This website uses cookies for analytics purposes only without any commercial intent. Find out more here. Our privacy statement can be found here. Some content (videos, iframes, forms,...) on this website will only appear when you have accepted the cookies.