There is considerable interest in electrically controlling nano-magnets in order to develop non-volatile magnetic memories (MRAM) . The microelectronics industry is facing major challenges related to the volatility of CMOS cache memory elements (usually SRAM and eDRAM). Due to decreasing devices size, leakage current in standby mode are now dominating the power dissipation of CMOS circuits. Furthermore, the increased density and reduction in die area lead to heat dissipation and reliability issues. Integration of non‐volatility in memory hierarchy would solve these issues by incredibly minimizing static power consumption. MRAMs are among most credible candidates that are low power and fast enough to compete with SRAM and replace them at cache level.
Most advanced MRAM devices are magnetic tunnel junctions (MTJ) that consist of two ferromagnetic layers separated by a very thin oxide barrier, one of the layer being the storage layer, the other is used as reference layer. Depending on the relative orientation of the magnetization of these two layers (parallel/ anti-parallel), the MTJ cell will exhibit low/high resistance through the tunnel magneto-resistance effect (TMR), defining the reading state (0/1). The writing operation relies on either the Spin Transfer Torque (STT), the transfer of spin angular momentum from the reference layer to the free layer, or the Spin-Orbit Torque (SOT)[2,3], due to the charge-spin conversion mediated by the spin-orbit interaction. The SOT mechanism allows for decoupling the read and write operations using a novel 3-terminal geometry (figure 1.a), enabling for robust deterministic magnetization reversal at sub-ns scale. Very recently, imec demonstrated the possibility to integrate such technology using industrial methods , which opens a new avenue for SOT-MRAM to explore in detail the capabilities of these advanced scaled devices. The focus of this PhD will address the two main challenges of SOT-MRAM: field-free switching and reduced power consumption.
The PhD research activity will consist in: i. characterization of the magnetic and transport properties of simplified stacks and full SOT-MTJ stacks for different SOT systems, ii. characterization and understanding behavior of 300mm integrated SOT-MTJ cells as a function of time and dimension size for different SOT materials, iii. Explore and improve different field-free switching concepts developed by imec.
The thesis work will be part of the Emerging magnetic memory program of IMEC. It has ambitious objectives, and will require to cover a broad area of competences: fundamentals of magnetism, spintronic and SOT physics, structural and magnetic characterization, electrical characterization SOT-MTJ, and finally device modeling of observed behaviors (micromagnetic simulations). The PhD applicant should therefore have a strong interest and motivation to understand the underlying physics, keeping the application in mind. Interested candidates should contact K. Garello for more ample information.
Required background: spintronic and magnetism physics knowledge, material science
Type of work: 80% experimental work (nano-fabrication, structural and electrical characterization), 10% physics- and device-based modeling (macrospin and micromagnetic siumaltions), 10% literature
Supervisor: Jo De Boeck, Bart Soree
Daily advisor: Kevin Garello
The reference code for this position is 1812-11. Mention this reference code on your application form.