Over the past 15 years, substantial progress has been made in silicon-based photonic integration platforms. Using highly-confined silicon waveguides, the footprint of photonic ICs has been dramatically reduced which has opened the door for their combination with CMOS technologies. This combination of CMOS device manufacturability, with photonic device interconnections opens a new realm for future generation devices. Contemporary Si photonic platforms use mostly group IV elements (Si and Ge) for the realization of active devices (modulators and photodetectors). However, there's an increasing interest in monolithic integration of III-V materials for realizing superior active device functionality, including on-chip light emission and improved modulation and detection capability.
As a consequence of the significant evolution in the device technologies in recent years, and the achievement of stable device platforms, benchmarking their reliability becomes a live project in their development. The focus of this project is to examine the Silicon-based photonic devices under development in imec, from a fundamental reliability perspective. This will involve quantify their initial properties, and assessing how these properties change as a function of electrical and optical stress.
The impacts of defects at the hetero-interfaces involves simulation of the p(i)n junctions present in these devices (photodetectors, waveguides, lasers, diodes), and initially evaluating the impact of the group IV (Si/Ge) interface on device characteristics. As the next generation III-V / Silicon technologies continue to develop, these hetero-interfaces are becoming an exciting and new area of photonics research. Attempts will be made to corroborate the simulation results will those measured from devices, in a bid to understand the key parameters that could impact the device characteristics (e.g. defects induced by the epitaxial processes employed in their fabrication).
This project will involve a significant amount of electrical characterisation, analysis of measured data, and from that generation of models to explain the results, which will extend to encompassing a prediction for the lifetime at operating conditions. In parallel the modelling of the devices will involve simulation efforts. This project does not involve working in the cleanroom per se, but will involve following the process flow of the relevant devices, in a bid to understand the processing challenges and their impact on the resultant device characteristics and indeed reliability.
Required background: Master’s degree in Physics, Electrical Engineering
Type of work: 10% dedicated to literature, 15% technology study, 50% experimental work, 20% simulation work, 5% reporting
Supervisor: Guido Groeseneken
Daily advisor: Barry OSullivan
The reference code for this position is 1812-26. Mention this reference code on your application form.