With the reduction of the gate pitch and gate length, the contacts to the gate and to the source/drain can’t be placed next to each other as standardly done on the relaxed-pitch nodes. At the scaled nodes (sub-10nm and beyond) there is a high risk of the gate to source/drain shorting due to insufficient space and limited access to the transistor gate connection between the n-doped and p-doped regions. Self-aligned contact (SAC) designs for the Middle of Line (MOL) provide effective solutions for the common scaling-related integration issues. Typical scaled-nodes integration flows include Replacement Metal Gate (RMG) or HighK Metal Gate (HKMG) and Self-Aligned Contact (SAC) modules. Such integration flows are usually based on the very challenging patterning process step: RMG recess for the creation of the SAC dielectric plug. The major issue with RMG recess process is requirement of the uniform recess of the gate electrode materials (highK, different work-function and low resistance metals). In addition to complexity of the RMG composition and need to etch the gate materials with the same etch rate the additional requirement is that the uniform recess is needed on the different gate-length dimensions, which is a difficult task due to process loading effects.
The idea behind this work is to explore the feasibility of several patterning approaches and develop plasma dry etch processes for HKMG or RMG recess for N5 and N10 integration. The test vehicles used will be at contacted poly pitch (CPP) of 42nm and 110nm, respectively and with the gate lengths range of 14-70nm. The development work will consists of designing patterning approaches, designing plasma etch experiments, 300nm nm wafer level test materail plasma dry etch processing and data analysis.
Type of project: Internship
Duration: 6 months
Required degree: Master of Engineering Technology, Master of Science
Required background: Nanoscience & Nanotechnology
Supervising scientist(s): For further information or for application, please contact: Dunja Radisic (Dunja.Radisic@imec.be)
Only for self-supporting students.