Wet-chemical atomic layer etching of metals for advanced chip interconnects

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Advancing future interconnects by nanoscale metal etching

To produce chips, the semiconductor industry starts with the first few layers containing the 'active' elements (transistors) which are then electrically connected via nanometer-sized metal lines. For this so-called 'damascene' metallization, barrier | liner | seed stacks, such as TaN | Ru | Cu, are used in which ruthenium (Ru) ensures a good adhesion of the copper (Cu) seed layer on the tantalum nitride (TaN) barrier. Afterwards, the structures are filled with Cu by electrochemical deposition. For the typically 10-20 metallization layers, Cu constitutes the largest material fraction as conductor to connect all transistors of the chip. Over the past tens of years, the industry managed to increase chip performance by increasing the number of transistors on the chip as well as decreasing the size of metallization lines enormously. However, some material properties of Cu make it not reliable anymore for more performant chips which have lines of only a few nanometer wide. Therefore, various alternative metals, such as ruthenium and molybdenum, are considered. Selective, wet-chemical removal of only a few nanometers of Ru in 'damascene' trenches which preserves surface roughness and developing an extremely controlled and reproducible process, is critical to enable future advanced interconnect technologies.

 

In the project, the Master thesis student will develop wet-chemical etching processes and study the (electro)chemistry involved, characterize the results in terms of surface roughness, selectivity, and etch rate as well as study the impact of surface chemistry, thermal treatments and crystal orientation on the dissolution behaviour. The lab work focuses on developing a better understanding first, eventually enabling the transferability to wafer level. Candidates should have a background in materials science with a strongly developed knowledge of chemistry.  ​



Type of project: Thesis

Required degree: Master of Engineering Technology, Master of Engineering Science, Master of Science

Required background: Chemistry/Chemical Engineering, Materials Engineering, Nanoscience & Nanotechnology

Supervising scientist(s): For further information or for application, please contact: Harold Philipsen (Harold.Philipsen@imec.be)

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