Digital design flow techniques for thin-film transistors

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Digital design flow techniques for thin-film transistors

Thin-film transistors (TFTs) are currently the dominant technology for switching circuits in flat-panel displays and are the main candidates for Internet of Things (IoT) applications in near future. Thanks to its low cost, high uniformity and flexible structure, it is possible to design many kinds of Application Specific Integrated Circuits (ASIC) with flexible TFTs. A flexible TFT-based microprocessor and Near-Field Communication (NFC) tag are some examples of such state-of-the-art work which are published by the Large Area Electronics department of imec in recent years.

In this field, there are two routes to improve maturity and circuit complexity: technology and design. Scaling, new process techniques, higher mobility materials and others can be categorized as technological improvements, and ongoing by the imec researchers in the laboratories. Correspondingly, new design techniques and tools are used to design integrated circuits with high performance, robustness and power efficiency.

The objective of this internship is to improve the digital design flow for thin-film technology on plastic incrementally. The student will be involved in various steps of a full flow, e.g., library characterization, RTL level digital design, Place&Route, combining this with measurements in the lab infrastructure. This internship gives the opportunity to work in a world-class design group with the prospect of results being used for state-of-the-art circuit realizations and scientific publications.

Type of project: Internship

Duration: 6 months

Required degree: Master of Engineering Technology or Master of Science or Master of Engineering Science

Required background: Electrotechnics/Electrical Engineering

Supervising scientist: For further information or for application, please contact Hikmet Celiker (hikmet.celiker@imec.be) and Kris Myny (kris.myny@imec.be).

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