Standard Cell R&D Designer for Logic Scaling
What you will do
- Standard cell design, layout and characterization in advanced nodes.
- Perform Library comparison and benchmarking (Power, Performance and Area).
- Design DoE for Test Structures in advanced nodes.
- Close interaction with process teams in a DTCO platform that includes lithography, device modeling and process integration.
What we do for you
Who you are
- Our ideal candidate has a PhD degree in Electrical Engineering, Electronical Engineer or related fields. Freshly graduated Master students with an interest for R&D are considered as well.
- We are looking for your R&D attitude and passion for innovation.
- Our ideal candidate has layout design experience and/or is familiar with Standard Cell design
- We aim for a candidate with a good knowledge of device physics. Familiarity with advanced semiconductor process and devices is a plus
- We value your Exposure to EDA tools for circuit and layout, like Cadence Composer/Virtuoso, Calibre, Hspice, as well as SKILL, Perl, TCL, python.
- We hope you have the ambition to drive the future technology, you are not afraid of proposing innovative ideas, and are willing to work to their circuital and system validation.
- We are looking for a communicative team player, who is also able to work independently.
- We appreciate your flexibility to change between different projects according to changing priorities.
- Given the international character of imec, your fluent knowledge of English is necessary.