As the chip scaling continues technology node to node to follow Moore’s law, computational jobs such as process control, Design, optical proximity correction (OPC) and design-for-manufacturability (DFM) have become too intensive in data handling to carry out. This big data usually refers to data volumes that are too large that traditional computational applications are inadequate.
The student will learn conventional computational lithography including OPC and DFM and work toward developing and applying “Machine learning”. He/she will optimize algorithms into OPC and DFM flows with the goal to 1) reduce number of iteration, 2) reduce computational resource, i.e. data handling and 3) optimize/minimize DOE to shorten turn-around-time (TAT) in the semiconductor manufacturing. Machine learning and optimization may include study of:
- Data handling, optimization with mathematical and statistical concepts (effect, global/local min. search algorithm), or develop a new concept
- Machine learning modeling - training using optimization algorithm.
- Apply machine learning into various area – process control, computational lithography and DFM
Required background: Knowledge in program language and UNIX (or linux) is a plus. Interest in Machine learning, and optimization theory is required. This project suits students from electrical engineering, computer science or mathematics.
Type of work: 50% preparation and execution of experiments, 30% data analysis, 20% literature study
Supervisor: Giovanni Lapenta (KU Leuven)
Daily advisors: Ryan Ryoung-han Kim, Jae Uk Lee
The reference code for this PhD position is STS1712-19. Mention this reference code on your application form.