Postdoctoral Researcher Microarchitectural Design and Optimization for 3D Integration

Leuven - PostDoc
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Meer dan twee weken geleden

As our Post Doc researcher Microarchitectural Design and Optimization for 3D Integration you will have the opportunity to work on our cutting-edge 3D technology and innovate the SoCs architecture, which results in an increasing computing power and lower energy consumption.

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Postdoctoral Researcher Microarchitectural Design and Optimization for 3D Integration

What you will do

The CMOS scaling driven by Moore's law is facing several challenges arising from the increasing complexities and abilities of photolithography to pattern the required feature sizes. It revealed that the two-year timeframe of Moore's law has been dropped and moved to a three-year cadence (tick-tock-tock) of optimizing technology and micro-architecture for the first time in sub-14nm technology nodes.
A large number of disruptive and immerging technologies including vertical gate-all-around (GAA) and complementary MOSFET have been investigated to maintain a continual scaling of CMOS technologies. In parallel to them, the heterogeneous integration of multiple technologies on the same logic die, which are becoming more viable with the advances in 3D wafer-stacking and sequential 3D technologies, can open a new landscape for EDA tools and design methodologies.
To fully utilize the benefits given by these new technologies, potential architectural paradigms beyond conventional ASIC design methodologies have emerged the research community. The potential candidate will have an opportunity to join the creative team and work on different aspects of the challenge as follow:
  • Profiling and identifying interesting use cases of 3D integrations for various applications such as high-performance/servers, mobile, and IoTs.
  • Re-thinking of the conventional design approach and innovating the micro-architecture of microprocessors for 3D technologies. 
  • System-level modeling and holistic assessment considering Power-Performance-Area-Cost (PPAC) impacts of such 3D solutions.

 

What we do for you

 

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow. 

We are proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth. 
We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a competitive salary.

Who you are

  • You have a PhD in the field of Computer Engineering or Electronic Engineering.
  • We are looking for your RTL design experiences with Verilog/VHDL, computer architectures, accelerators & many-core micro-architecture, digital circuit designs, and experiences in using commercial logic synthesis and place-and-route (Cadence, Synopsys) is a plus.
  • You are a constructive team player and actively share experience and knowledge with colleagues.
  • Your creativity, persistence and passion for what you do are highly valued.
  • We value your excellent networking and communication skills in English, as you will work in a multicultural environment.

This postdoctoral position is funded by imec through KU Leuven. Because of the specific financing statute which targets international mobility for postdocs, only candidates who did not stay or work/study in Belgium for more than 24 months in the past 3 years can be considered for the position (short stays such as holiday, participation in conferences, etc. are not taken into account).

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