Postdoctoral Researcher on Peripheral System Interfaces for emerging Storage Class Memories

Leuven - PostDoc
Meer dan twee weken geleden

Explore the impact of imec’s memory technology solutions at the system level to enable next gen data centers.

Postdoctoral Researcher on Peripheral System Interfaces for emerging Storage Class Memories

What you will do

There are many sources that predict exponential data growth toward 2020 and beyond. Yet they are all in broad agreement that the size of the digital universe will double every two years at least, a 50-fold growth from 2010 to 2020. The utilization of edge devices, in situ-computation and analysis, centralized storage and analysis, and deep learning methodologies which will accelerate data processing and storage requirements. This will eventually lead to rich, chip-level integration for diverse application domains, coupled with increasing adoption of data driven computing which will lead to chips with dozens of processing elements, accelerators and new NVM IPs appearing in the near future. 

Several new Non-Volatile Memory (NVM) technologies are currently being investigated to eventually satisfy the need for continuously higher storage capacity and system performance, lower power consumption, smaller form factor, lower system costs, long data‐retention capability and in-memory computation. Resistive RAM (RRAM), Phase Change RAM (PC-RAM) and Magneto-Resistive RAM (MRAM) are among the more mature NVM technologies. However, even the more advanced system architectures and interface fabrics that have been designed for substrates with conventional IPs in mind, will need to be modified to exploit the unique characteristics of these newer emerging NVMs. System interfaces play a key role in both the mobile and cloud markets and peripherals interfaces that occupy the sweet spot between DRAM and Flash based IPs are most likely be bear the brunt of changes to facilitate the adoption of new NVMs.

Presently, NVDIMM – P and NVMe are the two interfaces that are being optimized (NVMe for Flash based SSDs and PCM based Optanes) and developed (NVDIMM–P protocols being developed by JEDEC for persistent/NVM like 3D X point) further for NVMs that can lie between the DRAM based main memory and Flash based SSD’s. However, these need to be tuned effectively via micro-architectural modifications to appeal to the different NVMs like STT-MRAM/IGZO/OxRAM etc.
In this project you will:
  • Mimic existing protocols for PCIe/NVMe interfaces and integrate the existing software architectural blocks for storage memories with imec’s internal simulator framework
  • Develop system protocols and micro-architectural modifications to exploit emerging memory technologies as Storage Class Memory (SCM) solutions
  • Together with various experts inside imec, explore system-architecture trade-offs and perform application benchmarking for new memory technologies to enable low power and high performance SCM solutions.
  • Be responsible for:
    • System design of PCIe interface architectures
    • Setting memory system protocols and exploring QoS for different application domains
    • Exploring novel storage class memory architectures, system interfaces and associated protocols to enable better leveraging of the device characteristics for target application domains
    • Interfacing with imec’s process and circuit design experts to understand requirements and constraints of the 
    • Generating and securing IP
    • Keeping up-to-date on recent developments in the field. You do this by studying literature and interacting with your colleagues.
  • Maintain and build links with imec’s commercial and academic partners and follow up joint research projects with them 
  • Help drive imec’s technology and architecture roadmap to build the semiconductor technology for Data Driven Architectures of the near and far away future. 

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. We offer you an exciting position in a rapidly growing, multi-disciplinary team and the chance to define the storage system paradigms for Data Driven Architectures of the near and far away future.
We are proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through, 'our corporate university', we actively invest in your development to further your technical and personal growth. 
We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a competitive salary. 

Who you are

  • You have a PhD in the field of Computer Science, Computer Engineering or Electrical Engineering.
  • You have experience with the system design, computer architecture and software optimizations.
  • Extensive knowledge of C, C++ and Python.
  • We value experience with
  • System simulators and software platform development
  • Defining, developing, and utilizing tools, scripts, and other methods of system analysis and debugging
  • Designing with incomplete block information and memory/storage specs and communicating with circuit designers
  • Application profiling and Compiler optimizations
  • You work in a structured, transparent and accurate way.
  • You are a constructive team player and actively share experience and knowledge with colleagues.
  • Your networking skills, creativity, persistence and passion for what you do are highly valued. 
  • We are looking for your excellent communication skills in English, as you will work in a multicultural team and closely with our partners. 

This postdoctoral position is funded by imec through the KU Leuven. Because of the specific financing statute which targets international mobility for postdocs, only candidates who did not stay or work/study in Belgium for more than 24 months in the past 3 years can be considered for the position (short stays such as holiday, participation in conferences, etc. are not taken into account).​​


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