This single-chip SAW-less 5mm2 reconfigurable radio transceiver in 40nm digital CMOS is a true SDR front-end for frequencies between 174MHz and 6GHz.
Macro Name | Reconfigurable SAW-less radio transceiver for 0.1-6 GHz in 40nm digital CMOS |
Short Description(max 128 characters) | This single-chip SAW-less 5mm2 reconfigurable radio transceiver in 40nm digital CMOS is a true SDR front-end for frequencies between 174MHz and 6GHz. |
Extra description (optional) | Imec offers a white-box IP license with support on a SAW-less reconfigurable radio transceiver IP that has a reduced area of 5mm**2 and cost in 40nm digital CMOS. This single chip scalable radio (branded SCALDIO-2) is a true software-defined radio (SDR) front-end and a very economical implementation for next generation wireless communication, and is programmable to operate with all current and future cellular, WLAN, WPAN, broadcast and positioning standards in the frequency range between 174MHz and 6GHz. Its performance is optimized for GSM, UMTS, WCDMA, 3GPP_LTE and LTE Advanced. It consists of a single-chip reconfigurable receiver, transmitter and 2 frequency synthesizers in 40nm digital CMOS. The unique architecture of the flexible RF front-end achieves a power consumption, performance and CMOS chip area, competitive with current state-of-the-art single mode radio front-ends. SCALDIO-2 is a highly linear and low-noise reconfigurable radio transceiver eliminating the need of surface acoustic wave (SAW) filters, enabling a simplified antenna interface, hence resulting in a smaller board space and lower cost. The SAW-less transmitter is important with the evolution towards standards such as 3GPP-LTE where transmitters need to operate in multiple FDD (frequency division duplex) bands. |
Market category | Communications |
Primary Category | Analog & Mixed Signal IP:RF:Transceiver |
Node / process | 40nm Low Power CMOS |
Foundry | TSMC |
Maturity | Silicon proven on prototypes, hence only white-box license (no corner characterization performed for high volume production) |
Leaflet or datasheet URL | |
Conference where this IP has been published | ISSCC2011 |
Paper publication URL |
Download the Scaldio-2C_40nm_RX-ISSCC2011 publication here Download the Scaldio-2C-40nm_TX-ISSCC2011 publication here |
Chip area(for Hard IP only) (um**2) | 5176500 |
Width (for Hard IP only) (um) | 2030 um |
Height (for Hard IP only) (um) | 2550 um |
Power (uW/MHz) | 50mW - 200mW depending on the operation/configuration |
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