Compute system architecture
By enabling hardware-software codesign for high-performance computing and AI applications, imec models and prototypes the post-exascale system architecture of the future.
Analyzing a full genome in minutes, fluently interacting within highly dynamic and detailed AR/VR environments, quickly training AI models with unimaginable amounts of data, ... Looking into the future, the possibilities seem endless. Nevertheless, they’re limited in at least one respect: by the processing power of today’s compute systems. The challenge is anything but trivial: we need a performance improvement of three orders of magnitude.
That’s the goal of imec’s Compute System Architecture (CSA) R&D unit: to model and prototype scalable, reliable, secure and power-efficient architectures that can deliver the high-performance computing that's required for next-gen applications. We aim to be a partner for the high-performance computing (HPC) industry by achieving the most critical specifications while guaranteeing a high chance of success and a rapid time to market.
Read this in-depth article on how to address the scaling limitations of future computing systems.
Co-optimization across the system stack
At imec, we’re convinced that such a post-exascale system architecture can only be achieved by leveraging innovations across the system stack: from algorithms to core device components.
Click for more info on imec’s high-performance computing software lab.
Click for more info on our research into superconducting computing.
Imec’s CSA unit is a center of excellence enabling true hardware-software codesign to architect RISC-V-based post-exascale AI/HPC hardware. Designed in tune with advanced silicon geometry and novel communication technology, the unit provides reliable, secure and power-efficient high-performance AI computing solutions at scale.
The CSA team analyzes emerging usage models, and builds hardware and software prototypes for data-driven computing hardware capable of post-exascale performance.
Our tailored services include early design space exploration (DSE) for targeted domain-specific system architectures. We offer affordable, easy, and multi-fidelity insights during performance modeling and analysis of systems of interest – even for companies that operate in niche markets, academic institutions, and start-ups.
Have an early look at your system performance
Thanks to its in-house expertise in multi-fidelity performance modeling, the CSA infrastructure team helps you to perform an early DSE for your system at the architecture definition stage. Due to imec’s close interaction with leading foundries, it grants you early knowledge of your system’s performance at different technology nodes.
Through a range of services that supplement your in-house expertise, the team ensures that all early performance analysis questions at architecture definition level are covered:
- Configuration of functional blocks – DSE in heterogeneous multicore system hardware for optimizing performance/TCO
- Memory subsystem exploration – Investigation of novel, hybrid memory subsystems optimizing the performance of domain-specific hardware
- Chiplet platform marketplace – System-level partitioning in a chiplet-based architecture and PPAC trade-off analysis for viable alternatives
- Downselection of foundry technology node – Impact of heterogeneous technology selection for 3D/2.5D chiplet-based SiPs
Unique team
To tackle these complex challenges, the CSA R&D unit takes advantage of imec’s broad expertise in life science and AI applications and its technology manufacturing platform. But its greatest asset is its diverse and multidisciplinary team. Their knowhow includes:
- algorithms research
- software enablement
- compilers and middleware for heterogeneous systems
- micro-architecture
- circuit design
Want to join us? We're looking for talented researchers and engineers with varied skill sets to advance the art of high-performance system codesign.
Partner with us
The CSA R&D unit aims to grasp the fundamental compute problems and bottlenecks experienced by system companies who are developing next-gen usage models. Based on that understanding, we want to create new compute paradigms that can drive the industry – from hardware developers to software companies – forward for many years to come.
We don’t make products, but we also don’t limit ourselves to purely theoretical models. Through hardware and software prototypes, we want to demonstrate the link between systems and technologies.
Want to join our research, get early access to our results, and help shape our roadmap?
