Imec
KEYNOTE
Our CEO, Luc Van den hove will give the opening keynote on it’s time to futureproof our prosperity by superfueling innovation, enabling next-gen AI
The AI field is evolving at an incredibly fast pace, with major models and updates being released almost every month. As these models evolve beyond Large Language Models towards next-gen AI with advanced reasoning capabilities, compute systems struggle to handle the heterogeneous workloads in a performant and sustainable way. However, developing new, AI-optimized compute architectures and the enabling semiconductor technologies takes much more time than writing algorithms. To prevent bottlenecks slowing down AI-based advancements, we must reinvent compute architectures and semiconductor technology platforms.
The presentation will shed light on the need for flexible, versatile compute architectures implemented in flexible, versatile technology platforms while addressing the increasing challenges of density, power and memory. To speed up both advanced semiconductor technology R&D and full stack innovation for future AI applications, imec is expanding its pilot line infrastructure under the EU Chips Act. Next to new infrastructure, imec aims to boost innovation through intensified collaborations with complementary knowledge partners and through further internationalization, attracting global talent and building strong, local ecosystems for diverse application domains, like health and automotive.
Transformative innovations for humankind hinge on the innovation pace of the semiconductor industry. It’s time to supercharge our innovation engine, it’s time to futureproof our prosperity.
PANEL
- Chiplets: how far from making promise a reality?
Bart Placklé - VP automotive
Tuesday, 21 April 2026 - 11:00 CEST - 12:30 CEST
PAPERS
- An open source design exploration tool for battery and coolant configuration
Francesco Tosoni1, Yukai Chen2, Massimo Poncino3, Franco Fummi1 and Sara Vinco3
1Università di Verona, IT; 2imec, BE; 3Politecnico di Torino, IT - Design technology co-optimization of emerging storage class memories
Bowen Wang1 and Wim Dehaene2
1imec & KU Leuven, BE; 2KU Leuven - System technology co-optimization in 5.5D
Dragomir Milojevic, imec, BE - Late breaking results: chessy: coupled hybrid emulation with systemc-fpga synchronization
Lorenzo Ruotolo1, Giovanni Pollo1, Mohamed Amine Hamdi1, Matteo Risso1, Yukai Chen2, Enrico Macii1, Massimo Poncino1, Sara Vinco1, Alessio Burrello3 and Daniele Jahier Pagliari1
1Politecnico di Torino, IT; 2imec, BE; 3Politecnico di Torino | Università di Bologna, IT - Multi-partner project: efficient deep learning platforms for next-generation embedded edge-AI systems
Rajendra Bishnoi1, Mohammad Amin Yaldagard1, Konstantinos Stavrakakis1, Said Hamdioui1, Kanishkan Vadivel2, Pankaj Upadhyay2, Nicolas Rodriguez3, Teresa van Dam4, Sander Steeghs-Turchina4, Agathe Archet5, Prathamesh Deshpande6, Giovanni Grandi7, Hana Krichene8, William Fabre8 and Fabian Chersi8
1TU Delft, NL; 2IMEC Netherlands, NL; 3Silicon Austria Labs, AT; 4Almende B.V., NL; 5Thales Research & Technology, FR; 6Infineon Technologies, DE; 7Codasip GmbH, DE; 8CEA-LIST, FR
About
The conference addresses all aspects of research into technologies for electronic and systems engineering. It covers the design process, test, and tools for design automation of electronic products, ranging from integrated circuits to distributed large-scale systems. This domain includes both hardware and embedded software design issues. The conference scope also includes the specification of design requirements and new architectures for challenging application fields such as sustainable computing, smart societies and digital wellness, secure systems, autonomous systems and smart industry, and state-of-the-art applications of artificial intelligence. Engineers, scientists, and researchers involved in innovative industrial designs are particularly encouraged to submit papers to foster feedback ranging from design to research aspects.
Discover more
