CMOS: advanced and beyond
Discover why imec is the premier R&D center for advanced logic & memory devices.
Integrated photonics
Take a look at technologies for optical transceivers, sensors and more.
Health technologies
See how imec brings the power of chip technology to the world of healthcare.
Sensing and actuation
Explore imec’s CMOS- and photonics-based sensing and actuation systems.
Connectivity technology
Look into our reliable, high-performance, low-power network technologies.
More expertises
Discover all our expertises.
Research
Be the first to reap the benefits of imec’s research by joining one of our programs or starting an exclusive bilateral collaboration.
Manufacturing
Go from idea to scalable and reliable semiconductor manufacturing with IC-Link.
Venturing
We create and co-create new ventures, and we invest in and accelerate existing ventures.
Education and workforce development
Imec supports formal and on-the-job training for a range of careers in semiconductors.
NanoIC pilot line
Aligned with the EU Chips Act, access to the pilot line will accelerate beyond-2nm innovation.
ESTC 2026
September 09 - 11, 2026 | Helsinki, Finland
IEEE ESTC 2026 is the premier international event in the field of electronics packaging and system integration.
Imec will be participating in the 11th IEEE ISTC. The IEEE ESTC conference series is the premier venue for academics and industry to present and discuss the latest developments in electronics packaging, Covering a wide range of up-to-date topics in electronics packaging and system integration. Presentations are shown of leading edge research and development results related to those topics.
PRESENTATION(S)
- KEYNOTE
- Next-Generation Silicon Photonics powering future AI Compute
Joris Van Campenhout, Program director optical input/output (I/O)
Thursday, September 10, 2026
- Next-Generation Silicon Photonics powering future AI Compute
- POSTER
- Capillary Underfill Process Optimization for Fine‑Pitch, Narrow‑Gap Packaging Under Short‑Side Constraints
Mahan Morshedpour, Process Engineer in Wafer Bonding and Assembly team
- Capillary Underfill Process Optimization for Fine‑Pitch, Narrow‑Gap Packaging Under Short‑Side Constraints