/OCP global summot 2026

OCP global summot 2026

October 12 - 15, 2026 | San Jose, USA

The OCP Global Summit is the premier event uniting the most forward-thinking minds in open IT Ecosystem development. The Summit presents a unique platform for our Community from around the globe to share their insights, foster partnerships and showcase cutting-edge advancements in open hardware and software.

Panel

  • Kurt Herremans, program director automotive
    Introduction to a new OCP FCSA Sub-Project Workstream Server: Open Chiplet Economy
    Thu, October 15, 2:45pm - 3:05pm
    SJCC - Concourse Level - 211  
    The new workstream serves as a specialized sub-project of the OCP FCSA initiative, dedicated to advancing chiplet-based architectures for physical AI applications. This workstream, led by Cadence and championed by Arm and IMEC, will spearhead and coordinate efforts to standardize the implementation of chiplets in Physical AI systems, driving the development of specifications and best practices back into the FCSA standard. Its charter encompasses the coordination of research and fostering innovation. The group will provide expert guidance on compliance and safety considerations for deploying physical AI in practical, real-world environments. By working closely with other OCP project teams, the workstream aligns its initiatives with overarching standards and strategic priorities, ultimately strengthening innovation and interoperability throughout the OCP ecosystem.
  • Bart Placklé, SVP Automotive
    Physical AI: Addressing the barriers to interoperable chiplets in automotive and robotics 
    Thu, October 15, 3:10pm - 4:00pm 
    SJCC - Concourse Level - 211 
    Open Chiplet Economy Chiplets distribute functionality across multiple dies. Thus they challenge traditional safety assumptions inherited from monolithic SoCs. In such systems, safety can no longer be inferred from isolated components alone; it must be established across chiplets, die-to-die interconnects (D2D), and system-level supervision. We propose a structured functional safety approach for open chiplet architectures based on a clear reasoning rationale: Safety Goals → Failure Modes → Safety Mechanisms → Diagnostic Coverage → Safety Claim. The approach explicitly distinguishes interface-level from chiplet-internal failure modes, and treats the D2D interconnect as a safety-relevant element that can act both as a fault propagation path and as a diagnostic observation point. It further emphasizes an evidence-based path to safety, including failure analysis, mechanism allocation, and the computation and composition of diagnostic coverage across interconnect, chiplet, and supervisory layers.