CMOS: advanced and beyond
Discover why imec is the premier R&D center for advanced logic & memory devices.
Integrated photonics
Take a look at technologies for optical transceivers, sensors and more.
Health technologies
See how imec brings the power of chip technology to the world of healthcare.
Sensing and actuation
Explore imec’s CMOS- and photonics-based sensing and actuation systems.
Connectivity technology
Look into our reliable, high-performance, low-power network technologies.
More expertises
Discover all our expertises.
Research
Be the first to reap the benefits of imec’s research by joining one of our programs or starting an exclusive bilateral collaboration.
Foundry services
Build on our expertise for the design, prototyping and low-volume manufacturing of your innovative nanotech components and products.
Venturing and startups
Kick-start your business. Launch or expand your tech company by drawing on the funds and knowhow of imec’s ecosystem of tailored venturing support.
Education and workforce development
Imec supports formal and on-the-job training for a range of careers in semiconductors.
NanoIC pilot line
Aligned with the EU Chips Act, access to the pilot line will accelerate beyond-2nm innovation.
SPIE Photomask technology & EUV Lithography 2025
September 21 - 25, 2025 | Monterey, California, USA
The premier technical meeting for mask makers, EUVL, and emerging technologies
Imec
- Dry resist process optimization at the 0.33NA resolution limit and validation via large area e-test inspection - Stephane Lariviere
- Advancements in dry resist patterning towards high NA EUV enablement - Matteo Beggiato
- Enabling Curvilinear Masks: Novel Mask Qualification Methodology and Experimental Verification - Darko Trivkovic
- Advances of dry resist towards next-generation lines-spaces patterning in high NA EUV lithography - Matteo Beggiato
- Stitching at high NA EUV: a first experimental study - Vincent Wiaux
- Impact of MOR Anomalies on Lithography and OPC: Challenges and Solutions - Kareem Pervaiz
- Defectivity-Aware EUV Process Window Characterization for Monolithic Complimentary FET HAR and 3D Patterning - Yang, Hong-Cheon
- Lithography strategies on overlay control of back-side patterning - Saroj, Rajendra Kumar
- Unraveling the role of environment on the lithographic performance of metal oxide resists: key role of oxygen during post-exposure bake - Ivan Pollentier
- Understanding the impact of the EUV photon absorption distribution in a patterned EUV resist and its lithographic performance - Danilo De Simone
- TEM/EDX analysis in support of EUV mask model improvement - Rik Jonckheere
- Bright-field EUV mask patterning for extending the scaling roadmap - Kenichi Miyaguchi
Event details
Make plans to join the premier worldwide technical meeting for photomasks, patterning, metrology, materials, inspection/repair, mask business, extreme UV lithography, and emerging technologies.