Backside integrated charge pump technology for high-current-density AI applications

AI processors require efficient power delivery at unprecedented current densities not attainable with a power delivery network (PDN) designed in a classical IC technology, combining transistors and the metallization of the back-end-of-line.

Backside power delivery, on the other hand, breaks with the long-standing tradition of processing the signal and power delivery network on the front side of the Si wafer. With backside power delivery, the entire power distribution network is moved to the wafer’s backside.

Backside PDN enables low resistive interconnect as well as passive and active device integration. It has entered the scaling roadmap for advanced technology nodes (2nm and beyond).

This PhD research investigates the requirements of these devices and which charge pump/DC-DC conversion circuits enable efficient voltage conversion in the volume and area constraints of the application.

In order to have a maximum power delivery of the backside PDN, in-core, local DC-DC conversion is mandatory inside the advanced digital technology node.

The research objectives are:

• Capacitor and Switch device exploration on functional backside in angstrom nodes.
• Co-optimize technology and circuits (DTCO).
• Design prototype circuits in scaled nodes.
• Quantify improvements in current density and efficiency of power conversion enabled by Backside PDN technology.

With this co-design of circuit and technology, you will interact with a broad spectrum of fields ranging from material science, device development, logic and mixed analog-digital design and system-level considerations.