Design of Neuromorphic Mixed-Signal Integrated Circuits for Multi-Analyte Implantable Biosensor Arrays

Implantable biosensors offer a transformative approach to health monitoring by providing continuous, real-time insights into physiological states. However, the success of these systems depends critically on highly integrated, ultra-low-power designs capable of processing complex biological signals directly at the sensor node. Furthermore, next-generation multi-panel sensing arrays, which simultaneously detect diverse biochemical markers, require efficient processing of multiple data streams while maintaining the stringent power constraints of implantable devices.

At the Centre for Microsystems Technology (CMST), an imec-associated research laboratory at Ghent University, and through the ERC Starting Grant NEFELI, we are developing neuromorphic biosensors based on memristive devices. These sensors leverage brain-inspired architectures to enable energy-efficient, real-time sensing and processing of biochemical and physiological signals directly at the sensor level, thereby reducing reliance on power-hungry conventional computation.

The performance, reliability, and integration of such implantable systems can be significantly enhanced through the development of an Application-Specific Integrated Circuit (ASIC). ASIC technology enables hardware implementation of event-driven processing architectures that support in-memory computing, local learning mechanisms, and analogue signal conditioning, all of which are essential for real-time responsiveness, low latency, and ultra-low-power operation.

This PhD project aims to pioneer the development of an integrated ASIC platform tailored for multi-panel implantable biosensors with embedded neuromorphic processing capabilities. By drastically reducing power consumption while improving signal interpretation and classification, this research will pave the way for next-generation intelligent medical devices with broad applications in continuous health monitoring and disease management.

This research will involve:

• Development of a multi-channel biosensor ASIC front-end for simultaneous acquisition from electrochemical sensor arrays, integrating analogue readout, data conversion, power management, and wireless communication.
• Implementation of neuromorphic on-chip processing for real-time biosignal classification using event-driven and low-power hardware architectures.
• Design, verification, and tape out of the ASIC, optimised for low noise, ultra-low power consumption, and high integration density.
• Validation of the fabricated chip through electrical characterisation and integration with neuromorphic biosensor arrays in physiological monitoring environments.
• Development of a miniaturised system-on-chip (SoC) and evaluate its sensing performance, energy efficiency, and wireless communication capabilities.
• Demonstration of an implantable prototype, integrating the SoC with neuromorphic biosensors for intelligent health-monitoring applications.

The PhD researcher will be responsible for leading the ASIC development activities across both CMST (Ghent University) and imec Leuven. The candidate is expected to develop a deep understanding of the complete signal acquisition and processing chain, from sensor interface to on-chip intelligence, and to drive the development of the first fully functional prototype. Close collaboration with the multidisciplinary NEFELI team will be essential for sensor integration, data analysis, and system validation.

Required Skills and Background:

• Master's degree (or equivalent) in Electrical Engineering, Microelectronics, Electronics Engineering, or a related field.
• A strong foundation in analog and mixed-signal integrated circuit design, complemented by knowledge of signal processing theory and hardware-oriented algorithm implementation.
• Experience with IC design and simulation tools such as Cadence Virtuoso, Spectre, or equivalent environments.
• Knowledge of digital integrated circuit design is considered an asset.
• Experience with laboratory characterisation, PCB design, and measurement equipment.
• Familiarity with FPGA development and embedded firmware design is advantageous.