Simulating the Behavior of Emerging Protocols for Memory Interconnect, using Modern System-level Simulators

Modern applications demand larger memory capacity and higher bandwidth at lower power price. However, while the current memory technologies are approaching their scaling limit, it is becoming more challenging to meet the demand cost-efficiently. This situation calls for alternative memory interface technologies and memory subsystem architectures (e.g., Compute Express Link (CXL)) using more advanced technologies for memory organization and communication to improve memory capacity and bandwidth with lower cost. System-level simulations of such alternatives are of paramount importance in early-stage design space exploration.

During this research internship, you will work with existing system and memory simulators (e.g., gem5, Ramulator, DRAMSys), augmenting them with the features of emerging communication technologies (e.g., CXL). Also, you will evaluate the new features against state-of-the-art solutions, using emerging application benchmarks (e.g., SPEC, TPC).

Key responsibilities:

• Getting familiar with state-of-the-art and emerging memory interfaces, such as DDR and CXL
• Deeper understanding of modern simulation frameworks and adding new code
• Collaborating with experts to propose and implement features and constraints for extended system evaluations.

This role is ideal for someone who is deeply interested in system-level simulations, system and memory architectures (e.g., DRAM, NAND Flash), and working in an interdisciplinary environment that values innovation, creativity, and real-world impact.

Profile: You are analytical and detail-oriented, with a strong interest in system architecture and memory. You already know or eager to learn about modern and emerging memory interfaces, simulation frameworks, and evaluation tools.

Background: Currently pursuing or already have a degree in computer engineering, computer science, informatics, or electrical engineering. Has some background in computer architecture, memory design, operating systems, algorithms. Experience with open-source system-level simulators is an advantage.

Type of project: Internship, Thesis

Required degree: Master of Science, Master of Engineering Science, Master of Engineering Technology

Required background: Computer Science, Electrotechnics, Electrical Engineering

Duration: 6 months - 9 months

Supervising scientist(s): For more information on this topic, please contact Dwaipayan Biswas (dwaipayan.biswas@imec.be) and Khakim Akhunov (khakim.akhunov@imec.be).

Imec allowance will be provided for students studying at a non-Belgian university.