Master projects/internships - Leuven | More than two weeks ago
Explore impact of imec's memory technology on tomorrow's computer systems, together with ETH Zurich
In order to improve today’s computing devices like smartphones, laptops and high-performance servers, researchers must face the so-called memory wall: It is the memory within these computers that limits overall performance and energy efficiency. Hence computer architects tried to solve this problem using a memory hierarchy: fast, small memories enable caching of data close the computing cores, while larger, slower memories provide the large capacity to store large amounts of data.
Aggressive technology scaling has exposed limitations of current memory and data storage technologies like SRAM, DRAM and Flash. Thus, several new emerging memory technologies are currently being investigated to eventually satisfy the need for continuously higher memory capacity and system performance, with lower energy consumption. One such an example is Phase Change memory (PCM), as Intel recently introduced with their 3D Xpoint Optane products. Each of these new technologies has properties of interest, such as high density and low power, but also inherent flaws, for example high latency. Hence, a strong need for cross-objective trade-off exploration is required to match the requirements for the different memory hierarchy layers.
To correctly capture the overall impact of such a new memory technology, we translate these characteristics to system-level impact using a memory system simulator. The high-level nature (C++, python) of these simulators enables flexible exploration of different memory technologies and architectures.
In this master thesis internship, the student will focus on the interaction of main memory and storage layers in the memory hierarchy of figure 1. The interaction between these two is traditionally orchestrated by the Operating System using the concept of virtual memory. The student will extend an existing main memory simulator (Ramulator) and combine it with a storage simulator (MQSim), to accurately capture this interaction, enabling fast exploration of alternative memory and storage technology. This activity will happen partly at imec, Leuven, in the memory department, and partly at ETHZ, Zurich, in close cooperation with the team of Prof. Onur Mutlu.
Background: Electrical engineering with software interest (C++) or Computer science – with hardware interest (micro-architecture)
Type of Project: Combination of internship and thesis
Master's degree: Master of Engineering Technology; Master of Science; Master of Engineering Science
Master program: Computer Science; Nanoscience & Nanotechnology; Electrotechnics/Electrical Engineering
Duration: 6 - 9 months
For further information or for application, please contact Timon Evenblij (email@example.com).
Imec allowance will be provided for students studying at a non-Belgian university.